{"title":"基于fmcw的SAR系统中速度无关反投影的FPGA结构","authors":"F. Cholewa, M. Wielage, P. Pirsch, H. Blume","doi":"10.1109/ISSPIT.2016.7886044","DOIUrl":null,"url":null,"abstract":"This paper introduces a new FPGA architecture optimized for Frequency Modulated Continuous Wave (FMCW) Synthetic Aperture Radar (SAR). The architecture implements a Global-Backprojection-Algorithm (GBP) which has been modified to be independent of platform velocity (start-stop-approximation). The design supports parallelism of dedicated GBP processing modules in order to provide high performance. Compared to a MATLAB implementation on a single core Intel i5 at 3.2 GHz the dedicated implementation on a ML605 board provides a minimum speed-up factor of 94. The entire FPGA system was tested with real-life SAR data.","PeriodicalId":371691,"journal":{"name":"2016 IEEE International Symposium on Signal Processing and Information Technology (ISSPIT)","volume":"34 6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"An FPGA architecture for velocity independent backprojection in FMCW-based SAR systems\",\"authors\":\"F. Cholewa, M. Wielage, P. Pirsch, H. Blume\",\"doi\":\"10.1109/ISSPIT.2016.7886044\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper introduces a new FPGA architecture optimized for Frequency Modulated Continuous Wave (FMCW) Synthetic Aperture Radar (SAR). The architecture implements a Global-Backprojection-Algorithm (GBP) which has been modified to be independent of platform velocity (start-stop-approximation). The design supports parallelism of dedicated GBP processing modules in order to provide high performance. Compared to a MATLAB implementation on a single core Intel i5 at 3.2 GHz the dedicated implementation on a ML605 board provides a minimum speed-up factor of 94. The entire FPGA system was tested with real-life SAR data.\",\"PeriodicalId\":371691,\"journal\":{\"name\":\"2016 IEEE International Symposium on Signal Processing and Information Technology (ISSPIT)\",\"volume\":\"34 6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE International Symposium on Signal Processing and Information Technology (ISSPIT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSPIT.2016.7886044\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Symposium on Signal Processing and Information Technology (ISSPIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSPIT.2016.7886044","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An FPGA architecture for velocity independent backprojection in FMCW-based SAR systems
This paper introduces a new FPGA architecture optimized for Frequency Modulated Continuous Wave (FMCW) Synthetic Aperture Radar (SAR). The architecture implements a Global-Backprojection-Algorithm (GBP) which has been modified to be independent of platform velocity (start-stop-approximation). The design supports parallelism of dedicated GBP processing modules in order to provide high performance. Compared to a MATLAB implementation on a single core Intel i5 at 3.2 GHz the dedicated implementation on a ML605 board provides a minimum speed-up factor of 94. The entire FPGA system was tested with real-life SAR data.