{"title":"一种用于数字无线通信系统的55mbaud单片复杂自适应横向均衡器","authors":"D.H. Yom, H. Cheong","doi":"10.1109/ASIC.1997.616996","DOIUrl":null,"url":null,"abstract":"A 0.5 /spl mu/ CMOS single chip complex adaptive transversal equalizer for digital wireless communication is presented. The chip contains four 11-tap transversal digital filters and tap coefficient adaptation circuits. The chip can operate at up to 55 MBaud. Power dissipation is 3 Watts at 55 MBaud.","PeriodicalId":300310,"journal":{"name":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1997-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 55 MBaud single chip complex adaptive transversal equalizer for digital wireless communication systems\",\"authors\":\"D.H. Yom, H. Cheong\",\"doi\":\"10.1109/ASIC.1997.616996\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 0.5 /spl mu/ CMOS single chip complex adaptive transversal equalizer for digital wireless communication is presented. The chip contains four 11-tap transversal digital filters and tap coefficient adaptation circuits. The chip can operate at up to 55 MBaud. Power dissipation is 3 Watts at 55 MBaud.\",\"PeriodicalId\":300310,\"journal\":{\"name\":\"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-09-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1997.616996\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1997.616996","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 55 MBaud single chip complex adaptive transversal equalizer for digital wireless communication systems
A 0.5 /spl mu/ CMOS single chip complex adaptive transversal equalizer for digital wireless communication is presented. The chip contains four 11-tap transversal digital filters and tap coefficient adaptation circuits. The chip can operate at up to 55 MBaud. Power dissipation is 3 Watts at 55 MBaud.
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