Performance evaluation of a multicast packet switch employing dynamic random early detection

This paper proposes a multicast packet switching architecture that employs input/output buffers, and internal bandwidth expansion to reduce blocking substantially. Internal buffers enhance switch robustness under transient bursty traffic conditions. The switch regulates packet loss and delay using link-capacity back-pressure in conjunction with dynamic random early detection (or D-RED) algorithm. Because of these features the proposed switch exhibits excellent performance under multicast (as well as unicast) traffic even under heavy bursty traffic loads. Simulation studies show that the proposed architecture with its enhanced flow control features has superior packet loss performance compared to many other switch classes especially under multicast and bursty traffic.