利用片上DRAM探索3D系统的性能、功耗和温度特性

Jie Meng, Daniel Rossell, A. Coskun
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引用次数: 8

摘要

3D集成可以在同一芯片内的处理器内核上堆叠DRAM层。由于更低的内存访问延迟和更高的带宽,片上存储器具有显著提高性能的潜力。更高的核心性能会增加功率密度,需要对性能和温度之间的权衡进行彻底的评估。本文提出了一个全面的框架,用于探索具有片上DRAM的3D系统的功率,性能和温度特性。利用这个框架,我们量化了性能改进以及在带有片上DRAM的16核3D系统上运行的并行工作负载的功耗和热概况。与具有片外存储器的同等2D芯片相比,3D系统将应用程序性能平均提高了72.6%。单核功耗最高提高32.7%。然而,芯片峰值温度的增加被限制在1.5°C,因为低功耗DRAM层共享较热内核的热量。实验结果表明,虽然DRAM堆叠技术在高端系统中是一种很有前途的技术,但在成本或空间限制的嵌入式系统中,需要有效的热管理策略来弥补有效冷却的不足。
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Exploring performance, power, and temperature characteristics of 3D systems with on-chip DRAM
3D integration enables stacking DRAM layers on processor cores within the same chip. On-chip memory has the potential to dramatically improve performance due to lower memory access latency and higher bandwidth. Higher core performance increases power density, requiring a thorough evaluation of the tradeoff between performance and temperature. This paper presents a comprehensive framework for exploring the power, performance, and temperature characteristics of 3D systems with on-chip DRAM. Utilizing this framework, we quantify the performance improvement as well as the power and thermal profiles of parallel workloads running on a 16-core 3D system with on-chip DRAM. The 3D system improves application performance by 72.6% on average in comparison to an equivalent 2D chip with off-chip memory. Power consumption per core increases by up to 32.7%. The increase in peak chip temperature, however, is limited to 1.5°C as the lower power DRAM layers share the heat of the hotter cores. Experimental results show that while DRAM stacking is a promising technique for high-end systems, efficient thermal management strategies are needed in embedded systems with cost or space restrictions to compensate for the lack of efficient cooling.
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