A fractional chip wavelet zero tree codec (WZT) for video compression

[Summary form only given]. We introduce a motion wavelet transform zero tree (WZT) codec which achieves good compression ratios and can be implemented in a single ASIC of modest size. The codec employs a group of pictures (GOP) of two interlaced video frames, edge filters for the boundaries, intermediate field image compression and block compression structure. Specific features of the implementation for a small single chip are: 1) Transform filters are short and use dyadic rational coefficients with small numerators. Implementation can be accomplished with adds and shifts. We propose a Mallat pyramid resulting from five filter applications in the horizontal direction and three applications in the vertical direction. We use modified edge filters near block and image boundaries so as to utilize actual image values. 2) Motion image compression is used in place of motion compensation. We have applied transform compression in the temporal direction to a GOP of four fields. A two level temporal Mallat pyramid is used as a tensor product with the spatial pyramid. The linear edge filters are used at the fine level and the modified Haar filters at the coarse level, resulting in four temporal subbands. 3) Processing can be decoupled into the processing of blocks of 8 scan lines of 32 pixels each. This helps reduce the RAM requirements to the point that the RAM can be placed in the ASIC itself. 4) Quantization denominators are powers of two, enabling implementation by shifts. 5) Zero-tree coding yields a progressive encoding which is easily rate controlled. 6) The codec itself imposes a very low delay of less than 3.5 ms within a field and 67 ms for a GOP. The overall conclusion is that it is reasonable to expect that this method can be implemented, including memory, in a few mm/sup 2/ of silicon.