{"title":"基于增强多谐失真模型的高效多尔蒂功率放大器设计","authors":"C. Mazière, D. Gapillout, A. Xiong, T. Gasseling","doi":"10.1109/COMCAS.2015.7360453","DOIUrl":null,"url":null,"abstract":"This paper presents new identification methodologies dedicated to packaged transistor behavioral modeling. Using the background of the Poly-Harmonic Distortion (PHD) model formalism, the extension of the model kernels description up to the third order makes the behavioral model more robust and accurate for a wide range of impedance loading conditions, which is a primordial when designing a High Power Added Efficiency Doherty Amplifier, where a load impedance variation can be observed as a function of the power level. In this paper, a model of a 15 W GaN Packaged Transistor has been extracted from Load Pull measurements for Class AB and Class C conditions. This new Enhanced PHD model (EPHD) and the original PHD model are benchmarked against Load Pull measurements in order to check the new formulation. An advanced validation at the circuit level was done in order to verify the ability of the EPHD model to predict the overall Doherty Amplifier performances.","PeriodicalId":431569,"journal":{"name":"2015 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS)","volume":"226 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"High efficiency Doherty Power Amplifier design using Enhanced Poly-Harmonic Distortion model\",\"authors\":\"C. Mazière, D. Gapillout, A. Xiong, T. Gasseling\",\"doi\":\"10.1109/COMCAS.2015.7360453\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents new identification methodologies dedicated to packaged transistor behavioral modeling. Using the background of the Poly-Harmonic Distortion (PHD) model formalism, the extension of the model kernels description up to the third order makes the behavioral model more robust and accurate for a wide range of impedance loading conditions, which is a primordial when designing a High Power Added Efficiency Doherty Amplifier, where a load impedance variation can be observed as a function of the power level. In this paper, a model of a 15 W GaN Packaged Transistor has been extracted from Load Pull measurements for Class AB and Class C conditions. This new Enhanced PHD model (EPHD) and the original PHD model are benchmarked against Load Pull measurements in order to check the new formulation. An advanced validation at the circuit level was done in order to verify the ability of the EPHD model to predict the overall Doherty Amplifier performances.\",\"PeriodicalId\":431569,\"journal\":{\"name\":\"2015 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS)\",\"volume\":\"226 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/COMCAS.2015.7360453\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/COMCAS.2015.7360453","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High efficiency Doherty Power Amplifier design using Enhanced Poly-Harmonic Distortion model
This paper presents new identification methodologies dedicated to packaged transistor behavioral modeling. Using the background of the Poly-Harmonic Distortion (PHD) model formalism, the extension of the model kernels description up to the third order makes the behavioral model more robust and accurate for a wide range of impedance loading conditions, which is a primordial when designing a High Power Added Efficiency Doherty Amplifier, where a load impedance variation can be observed as a function of the power level. In this paper, a model of a 15 W GaN Packaged Transistor has been extracted from Load Pull measurements for Class AB and Class C conditions. This new Enhanced PHD model (EPHD) and the original PHD model are benchmarked against Load Pull measurements in order to check the new formulation. An advanced validation at the circuit level was done in order to verify the ability of the EPHD model to predict the overall Doherty Amplifier performances.