{"title":"同时双向界面的设计优化方法","authors":"D. de Araujo, M. Cases, N. Pham","doi":"10.1109/EPEP.2001.967667","DOIUrl":null,"url":null,"abstract":"This paper describes an electrical design optimization methodology for a high-speed point-to-point source-synchronous simultaneous bidirectional interface. These physical links are typically used to interconnect multiple processor subsystems to build symmetric multi-processor (SMP) systems, as well as to connect input/output (I/O) subsystems across relatively long distances. Major design issues such as attenuation, crosstalk, delay skew, impedance control and inter-symbol interference (ISI) are discussed for long and parallel external interconnections.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Design optimization methodology for simultaneous bidirectional interface\",\"authors\":\"D. de Araujo, M. Cases, N. Pham\",\"doi\":\"10.1109/EPEP.2001.967667\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes an electrical design optimization methodology for a high-speed point-to-point source-synchronous simultaneous bidirectional interface. These physical links are typically used to interconnect multiple processor subsystems to build symmetric multi-processor (SMP) systems, as well as to connect input/output (I/O) subsystems across relatively long distances. Major design issues such as attenuation, crosstalk, delay skew, impedance control and inter-symbol interference (ISI) are discussed for long and parallel external interconnections.\",\"PeriodicalId\":174339,\"journal\":{\"name\":\"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-10-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEP.2001.967667\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.2001.967667","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design optimization methodology for simultaneous bidirectional interface
This paper describes an electrical design optimization methodology for a high-speed point-to-point source-synchronous simultaneous bidirectional interface. These physical links are typically used to interconnect multiple processor subsystems to build symmetric multi-processor (SMP) systems, as well as to connect input/output (I/O) subsystems across relatively long distances. Major design issues such as attenuation, crosstalk, delay skew, impedance control and inter-symbol interference (ISI) are discussed for long and parallel external interconnections.