Hardware development of Athena WFI frame processing module

The wide field imager (WFI) is one of the two focal plane instruments on-board the Athena x-ray astronomy mission, the second large-class mission of the European Space Agency. Athena is planned to be launched in 2034 and will be stationed in Lagrange point L1, from where it will perform observations in the x-ray spectrum, from 0.2 keV to 15 keV. The frame processing module (FPM) is part of the detector electronics (DE) of the Athena WFI, which has the main task of reading out the WFI detector array, digitizing it, performing real-time frame processing, and event extraction, using offset correction and threshold maps. The high number of 512×512 pixels on each large detector (LD), the fast readout cycle (5 ms) and the complex sequence of digital signals required to read out the WFI detectors present some stringent design requirements on the electronics used in the FPM as well as on the programmable logic implemented in the selected field programmable gate array (FPGA). This paper describes the hardware design of the FPM and the preliminary engineering model that has already been manufactured. Given the criticality of the FPM, this early development model already includes most of the flight-like electronics based on state-of-the-art radiation hard ADCs, FPGAs and SSRAM memories. Specific design challenges are addressed related to the electronic implementation of the FPM, which already fulfils most of the design rules according the ECSS standards.