Adrian Hofmann, Andreas Käberlein, Elias Kögel, Marco Ramsbeck, J. Horstmann
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A 12-bit SAR ADC in 180 nm Technology for Smart Sensor Systems
High-level models serve their purpose for a time- and memory-efficient abstraction of the implementation and functionality of integrated circuits, but often experience high distinction between the transistor-level simulation and measurements. A 12-bit SAR ADC is designed as a high-level model as well as a transistor-level implementation in a 0.18 μm technology for smart sensor system applications. An accurate high-level model is developed and compared to actual transistor-level simulations as well as measurement results of the manufactured chip. Crucial design steps are shown to accurately design the high-level model and achieve a model that closely follows the behavior of the manufactured circuit, which can be used to highly accelerate the design process of smart sensor systems