Real-time Implementation of Cyclostationary Analysis using FPGAs

Cyclostationary analysis is an important tool for understanding periodic phenomenon and the spectral correlation density (SCD) function is commonly used in its characterisation. Due to its high computational requirements it is not commonly applied to real-time signals, despite the fact that efficient FFT-based techniques for estimation of the SCD exist. In this research, we aim to address this issue by developing high-performance cyclostationary analysis techniques through FPGA acceleration, and apply them to enable new applications. We will first explore the tradeoff between arithmetic precision and implementation area, applying statistics-based analysis techniques to understand how signal to quantisation noise is affected by wordlength in fixed and floating-point implementations. Next, high-speed FPGA-based systolic architectures for estimating the SCD will be studied. Finally, we apply our optimised arithmetic and architectures to real-time, radio frequency applications.