高速通信中ambaax3协议的设计与验证

Nidish Kumar P, Dineshkumar V, A. M, S. R, E. S.
{"title":"高速通信中ambaax3协议的设计与验证","authors":"Nidish Kumar P, Dineshkumar V, A. M, S. R, E. S.","doi":"10.1109/STCR55312.2022.10009388","DOIUrl":null,"url":null,"abstract":"Micro-electronics are now very important in every part of a person's life in the age of present technology. Due to this, the demand for their components and their availability decreases the amount of time they can be made and raises the failure rate of the final product. Therefore methods that increase the of hardware design and verification effectiveness and efficiency are extremely valuable. Advanced Microcontroller Bus Architecture (AMBA) is an open-standard, on-chip interface inter connect. That provides the standard set of rules to achieve the communication inside the system on chip. AXI-Advanced Extensible interconnect comes under the AMBA family and is used to communicate (transfer) the data from high-speed IP cores (master-slave). High frequency and high performance system designs are offered by AXI. It is a protocol for on-chip communication. It is appropriate for low-delay designs with large bandwidth and frequency. It is compatible with current APB and AHB interfaces. The AXI protocols unique address, data phases and control are one of its defining characteristics. The work involved in the design of AXI protocol in an effective manner using the System Verilog. The design is verified using the QuestaSim tool.","PeriodicalId":338691,"journal":{"name":"2022 Smart Technologies, Communication and Robotics (STCR)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and Verification of AMBA AXI3 Protocol for High Speed Communication\",\"authors\":\"Nidish Kumar P, Dineshkumar V, A. M, S. R, E. S.\",\"doi\":\"10.1109/STCR55312.2022.10009388\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Micro-electronics are now very important in every part of a person's life in the age of present technology. Due to this, the demand for their components and their availability decreases the amount of time they can be made and raises the failure rate of the final product. Therefore methods that increase the of hardware design and verification effectiveness and efficiency are extremely valuable. Advanced Microcontroller Bus Architecture (AMBA) is an open-standard, on-chip interface inter connect. That provides the standard set of rules to achieve the communication inside the system on chip. AXI-Advanced Extensible interconnect comes under the AMBA family and is used to communicate (transfer) the data from high-speed IP cores (master-slave). High frequency and high performance system designs are offered by AXI. It is a protocol for on-chip communication. It is appropriate for low-delay designs with large bandwidth and frequency. It is compatible with current APB and AHB interfaces. The AXI protocols unique address, data phases and control are one of its defining characteristics. The work involved in the design of AXI protocol in an effective manner using the System Verilog. The design is verified using the QuestaSim tool.\",\"PeriodicalId\":338691,\"journal\":{\"name\":\"2022 Smart Technologies, Communication and Robotics (STCR)\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-12-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 Smart Technologies, Communication and Robotics (STCR)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/STCR55312.2022.10009388\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 Smart Technologies, Communication and Robotics (STCR)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/STCR55312.2022.10009388","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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摘要

在当今科技时代,微电子技术在人们生活的各个方面都非常重要。因此,对其组件和可用性的需求减少了它们的制造时间,并提高了最终产品的故障率。因此,提高硬件设计和验证有效性和效率的方法是非常有价值的。高级微控制器总线体系结构(AMBA)是一种开放标准的片上接口互连。这为实现片上系统内部的通信提供了一套标准的规则。axis - advanced可扩展互连属于AMBA系列,用于通信(传输)来自高速IP核(主从)的数据。AXI提供高频率和高性能的系统设计。它是用于片上通信的协议。适用于大带宽、大频率的低时延设计。兼容当前的APB和AHB接口。AXI协议的唯一地址、数据阶段和控制是其定义特征之一。使用系统Verilog有效地设计AXI协议所涉及的工作。使用QuestaSim工具对设计进行了验证。
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Design and Verification of AMBA AXI3 Protocol for High Speed Communication
Micro-electronics are now very important in every part of a person's life in the age of present technology. Due to this, the demand for their components and their availability decreases the amount of time they can be made and raises the failure rate of the final product. Therefore methods that increase the of hardware design and verification effectiveness and efficiency are extremely valuable. Advanced Microcontroller Bus Architecture (AMBA) is an open-standard, on-chip interface inter connect. That provides the standard set of rules to achieve the communication inside the system on chip. AXI-Advanced Extensible interconnect comes under the AMBA family and is used to communicate (transfer) the data from high-speed IP cores (master-slave). High frequency and high performance system designs are offered by AXI. It is a protocol for on-chip communication. It is appropriate for low-delay designs with large bandwidth and frequency. It is compatible with current APB and AHB interfaces. The AXI protocols unique address, data phases and control are one of its defining characteristics. The work involved in the design of AXI protocol in an effective manner using the System Verilog. The design is verified using the QuestaSim tool.
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