以rtos为中心的嵌入式系统设计硬件/软件协同模拟器

S. Honda, T. Wakabayashi, H. Tomiyama, H. Takada
{"title":"以rtos为中心的嵌入式系统设计硬件/软件协同模拟器","authors":"S. Honda, T. Wakabayashi, H. Tomiyama, H. Takada","doi":"10.1145/1016720.1016760","DOIUrl":null,"url":null,"abstract":"This work presents an RTOS-centric hardware/software cosimulator which we have developed for embedded system design. One of the most remarkable features in our cosimulator is that it has a complete simulation model of an RTOS which is widely used in industry, so that application tasks including RTOS service calls are natively executed on a host computer. Our cosimulator also features cosimulation with functional simulation models of hardware written in C/C++ and cosimulation with HDL simulators. A case study with a JPEG decoder application demonstrates the effectiveness of our cosimulator.","PeriodicalId":127038,"journal":{"name":"International Conference on Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004.","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"38","resultStr":"{\"title\":\"RTOS-centric hardware/software cosimulator for embedded system design\",\"authors\":\"S. Honda, T. Wakabayashi, H. Tomiyama, H. Takada\",\"doi\":\"10.1145/1016720.1016760\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents an RTOS-centric hardware/software cosimulator which we have developed for embedded system design. One of the most remarkable features in our cosimulator is that it has a complete simulation model of an RTOS which is widely used in industry, so that application tasks including RTOS service calls are natively executed on a host computer. Our cosimulator also features cosimulation with functional simulation models of hardware written in C/C++ and cosimulation with HDL simulators. A case study with a JPEG decoder application demonstrates the effectiveness of our cosimulator.\",\"PeriodicalId\":127038,\"journal\":{\"name\":\"International Conference on Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004.\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-09-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"38\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Conference on Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/1016720.1016760\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1016720.1016760","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 38

摘要

本文提出了一个以rtos为中心的硬件/软件协同模拟器,它是我们为嵌入式系统设计而开发的。我们的协同模拟器最显著的特点之一是它具有广泛应用于工业的RTOS的完整仿真模型,因此包括RTOS服务调用在内的应用程序任务在主机上本机执行。我们的协同模拟器还具有与用C/ c++编写的硬件功能仿真模型的协同仿真以及与HDL模拟器的协同仿真。一个JPEG解码器应用的案例研究证明了我们的协同模拟器的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
RTOS-centric hardware/software cosimulator for embedded system design
This work presents an RTOS-centric hardware/software cosimulator which we have developed for embedded system design. One of the most remarkable features in our cosimulator is that it has a complete simulation model of an RTOS which is widely used in industry, so that application tasks including RTOS service calls are natively executed on a host computer. Our cosimulator also features cosimulation with functional simulation models of hardware written in C/C++ and cosimulation with HDL simulators. A case study with a JPEG decoder application demonstrates the effectiveness of our cosimulator.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Efficient mapping of hierarchical trees on coarse-grain reconfigurable architectures Analytical models for leakage power estimation of memory array structures Memory accesses management during high level synthesis A novel deadlock avoidance algorithm and its hardware implementation Fast exploration of bus-based on-chip communication architectures
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1