Performance estimation of conventional and reversible logic circuits using QCA implementation platform

The size of complementary metal oxide semiconductor (CMOS) transistor keep shrinking to increase the density on chip in accordance with Moore's Law [1]. The scaling affect the device performance due to constraints like heat dissipation and power consumption [3], further scaling would hit the physical limitation [16]. Effortshave been made to come up with the new device alternative to CMOS, to continually improve the development of electronic device. Quantum Dot Cellular Automata (QCA) technology is one such promising alternative, that can overcome the scaling issue and offer fast computation performance, high density, and low power consumption. Another emerging technology that can help in reducing heat dissipation is reversible logic. This paper proposes the idea of implementing reversible combinational circuits and square computation circuits using QCA architecture. The designs are captured and simulated using QCA Designer software, performance of each designs namely area and energy are compared for conventional and Reversible QCA design.