{"title":"面向大规模并行应用的处理器工作负载分配算法","authors":"Serge Midonnet, Achille Wattelar","doi":"10.1109/SBAC-PADW.2016.13","DOIUrl":null,"url":null,"abstract":"Directed Acyclic Graph (DAG) is a standard model used to describe tasks that execute according to precedence constraints and that allows intra-task parallelism. This model is well suited to camera-based applications where multiple treatments must be executed in parallel according to the camera input, such applications found for example in self-driving cars or image recognition via convolutional neural network (CNN). Such applications are used on embedded systems and therefore require low energy cost and a limited hardware space. The main contribution of this paper is to present a new partitioning algorithm based on a DAG stretching technique. This stretching algorithm frees processor cores and thus implies energy savings and leads to new hardware design using a reduced number of processors. We present an experimental evaluation of this algorithm to show its efficiency.","PeriodicalId":186179,"journal":{"name":"2016 International Symposium on Computer Architecture and High Performance Computing Workshops (SBAC-PADW)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Processor Workload Distribution Algorithm for Massively Parallel Applications\",\"authors\":\"Serge Midonnet, Achille Wattelar\",\"doi\":\"10.1109/SBAC-PADW.2016.13\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Directed Acyclic Graph (DAG) is a standard model used to describe tasks that execute according to precedence constraints and that allows intra-task parallelism. This model is well suited to camera-based applications where multiple treatments must be executed in parallel according to the camera input, such applications found for example in self-driving cars or image recognition via convolutional neural network (CNN). Such applications are used on embedded systems and therefore require low energy cost and a limited hardware space. The main contribution of this paper is to present a new partitioning algorithm based on a DAG stretching technique. This stretching algorithm frees processor cores and thus implies energy savings and leads to new hardware design using a reduced number of processors. We present an experimental evaluation of this algorithm to show its efficiency.\",\"PeriodicalId\":186179,\"journal\":{\"name\":\"2016 International Symposium on Computer Architecture and High Performance Computing Workshops (SBAC-PADW)\",\"volume\":\"61 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 International Symposium on Computer Architecture and High Performance Computing Workshops (SBAC-PADW)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SBAC-PADW.2016.13\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Symposium on Computer Architecture and High Performance Computing Workshops (SBAC-PADW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SBAC-PADW.2016.13","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Processor Workload Distribution Algorithm for Massively Parallel Applications
Directed Acyclic Graph (DAG) is a standard model used to describe tasks that execute according to precedence constraints and that allows intra-task parallelism. This model is well suited to camera-based applications where multiple treatments must be executed in parallel according to the camera input, such applications found for example in self-driving cars or image recognition via convolutional neural network (CNN). Such applications are used on embedded systems and therefore require low energy cost and a limited hardware space. The main contribution of this paper is to present a new partitioning algorithm based on a DAG stretching technique. This stretching algorithm frees processor cores and thus implies energy savings and leads to new hardware design using a reduced number of processors. We present an experimental evaluation of this algorithm to show its efficiency.