Aquabolt-XL:三星HBM2-PIM与内存处理ML加速器和超越

J. Kim, Shinhaeng Kang, Sukhan Lee, Hyeonsu Kim, Woongjae Song, Yuhwan Ro, Seungwon Lee, David Wang, Hyunsung Shin, BengSeng Phuah, Jihyun Choi, J. So, Yeon-Gon Cho, Joonho Song, J. Choi, Jeonghyeon Cho, Kyomin Sohn, Y. Sohn, Kwang-il Park, N. Kim
{"title":"Aquabolt-XL:三星HBM2-PIM与内存处理ML加速器和超越","authors":"J. Kim, Shinhaeng Kang, Sukhan Lee, Hyeonsu Kim, Woongjae Song, Yuhwan Ro, Seungwon Lee, David Wang, Hyunsung Shin, BengSeng Phuah, Jihyun Choi, J. So, Yeon-Gon Cho, Joonho Song, J. Choi, Jeonghyeon Cho, Kyomin Sohn, Y. Sohn, Kwang-il Park, N. Kim","doi":"10.1109/HCS52781.2021.9567191","DOIUrl":null,"url":null,"abstract":"Using PIM to overcome memory bottleneck • Although various bandwidth increase methods have been proposed, it is physically impossible to achieve a breakthrough increase. - Limited by # of PCB wires, # of CPU ball, and thermal constraints • PIM has been proposed to improve performance of bandwidth-intensive workloads and improve energy efficiency by reducing computing-memory data movement.","PeriodicalId":246531,"journal":{"name":"2021 IEEE Hot Chips 33 Symposium (HCS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"Aquabolt-XL: Samsung HBM2-PIM with in-memory processing for ML accelerators and beyond\",\"authors\":\"J. Kim, Shinhaeng Kang, Sukhan Lee, Hyeonsu Kim, Woongjae Song, Yuhwan Ro, Seungwon Lee, David Wang, Hyunsung Shin, BengSeng Phuah, Jihyun Choi, J. So, Yeon-Gon Cho, Joonho Song, J. Choi, Jeonghyeon Cho, Kyomin Sohn, Y. Sohn, Kwang-il Park, N. Kim\",\"doi\":\"10.1109/HCS52781.2021.9567191\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Using PIM to overcome memory bottleneck • Although various bandwidth increase methods have been proposed, it is physically impossible to achieve a breakthrough increase. - Limited by # of PCB wires, # of CPU ball, and thermal constraints • PIM has been proposed to improve performance of bandwidth-intensive workloads and improve energy efficiency by reducing computing-memory data movement.\",\"PeriodicalId\":246531,\"journal\":{\"name\":\"2021 IEEE Hot Chips 33 Symposium (HCS)\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-08-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE Hot Chips 33 Symposium (HCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HCS52781.2021.9567191\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE Hot Chips 33 Symposium (HCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HCS52781.2021.9567191","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17

摘要

利用PIM克服内存瓶颈•虽然提出了各种带宽增加方法,但物理上不可能实现突破性增长。-受PCB线数、CPU球数和热约束的限制•PIM已被提出用于改善带宽密集型工作负载的性能,并通过减少计算内存数据移动来提高能源效率。
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Aquabolt-XL: Samsung HBM2-PIM with in-memory processing for ML accelerators and beyond
Using PIM to overcome memory bottleneck • Although various bandwidth increase methods have been proposed, it is physically impossible to achieve a breakthrough increase. - Limited by # of PCB wires, # of CPU ball, and thermal constraints • PIM has been proposed to improve performance of bandwidth-intensive workloads and improve energy efficiency by reducing computing-memory data movement.
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