具有增强抗噪能力的双输入8晶体管SRAM单元

2016 International Symposium on Fundamentals of Electrical Engineering (ISFEE) Pub Date : 2016-06-01 DOI:10.1109/ISFEE.2016.7803191

A. Korotkov, D. Morozov, J. Hauer

{"title":"具有增强抗噪能力的双输入8晶体管SRAM单元","authors":"A. Korotkov, D. Morozov, J. Hauer","doi":"10.1109/ISFEE.2016.7803191","DOIUrl":null,"url":null,"abstract":"The paper presents eight transistors SRAM cell with improved noise (interferences) immunity. The effect is reached by use an additional bus to control the state of the cell trigger. The results of the simulations as well as experiments have been demonstrated. The following SRAM characteristics have been obtained SNM = 222 mV, WRM = 1017 mV, the cell discharge current is 114 uA. The test chip has been fabricated with parameters of 180 nm CMOS process of UMC.","PeriodicalId":240170,"journal":{"name":"2016 International Symposium on Fundamentals of Electrical Engineering (ISFEE)","volume":"442 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A two-input 8-transistor SRAM cell with enhanced noise immunity\",\"authors\":\"A. Korotkov, D. Morozov, J. Hauer\",\"doi\":\"10.1109/ISFEE.2016.7803191\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper presents eight transistors SRAM cell with improved noise (interferences) immunity. The effect is reached by use an additional bus to control the state of the cell trigger. The results of the simulations as well as experiments have been demonstrated. The following SRAM characteristics have been obtained SNM = 222 mV, WRM = 1017 mV, the cell discharge current is 114 uA. The test chip has been fabricated with parameters of 180 nm CMOS process of UMC.\",\"PeriodicalId\":240170,\"journal\":{\"name\":\"2016 International Symposium on Fundamentals of Electrical Engineering (ISFEE)\",\"volume\":\"442 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 International Symposium on Fundamentals of Electrical Engineering (ISFEE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISFEE.2016.7803191\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Symposium on Fundamentals of Electrical Engineering (ISFEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISFEE.2016.7803191","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 1

摘要

本文提出了一种具有抗噪声(干扰)能力的8个晶体管SRAM单元。这种效果是通过使用额外的总线来控制单元触发器的状态来实现的。仿真结果和实验结果都得到了验证。得到了SRAM的如下特性:SNM = 222 mV, WRM = 1017 mV，电池放电电流为114 uA。测试芯片采用联华电子180nm CMOS工艺参数制作。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

A two-input 8-transistor SRAM cell with enhanced noise immunity

The paper presents eight transistors SRAM cell with improved noise (interferences) immunity. The effect is reached by use an additional bus to control the state of the cell trigger. The results of the simulations as well as experiments have been demonstrated. The following SRAM characteristics have been obtained SNM = 222 mV, WRM = 1017 mV, the cell discharge current is 114 uA. The test chip has been fabricated with parameters of 180 nm CMOS process of UMC.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2016 International Symposium on Fundamentals of Electrical Engineering (ISFEE)

自引率

0.00%

发文量