Sabahattin Doruk Yildön, Utku Tuncel, S. Topaloglu
{"title":"0.25 um GaAs pHEMT工艺24ghz RFIC功率放大器设计","authors":"Sabahattin Doruk Yildön, Utku Tuncel, S. Topaloglu","doi":"10.1109/SIU55565.2022.9864767","DOIUrl":null,"url":null,"abstract":"This work is based on 0.25-um Gallium Arsenide (GaAs) (pHEMT) process. The GaAs pHEMT process, is chosen because it has been shown the most suitable technology to provide the high output power and a reasonable stability despite its high cost. A 24 GHz radio frequency integrated circuit (RFIC) Power Amplifier that is designed and simulated. The electromagnetic (EM) simulation and layout design are performed using the AWR Design Environment from the Cadence Company. The power amplifier is designed as a 2-way combining network with Class- AB topology. This RFIC Power Amplifier design achieves a power gain of 8.08 dB, Power Added Efficiency of 37.3%, P1dB of 24.82 dBm, P3dB of 25.37 dBm and PSAT of 28.14 dBm with the size of 3.36 mm2 (1.2 mm x 2.8 mm).","PeriodicalId":115446,"journal":{"name":"2022 30th Signal Processing and Communications Applications Conference (SIU)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 24 GHz RFIC Power Amplifier Design in 0.25-um GaAs pHEMT Process\",\"authors\":\"Sabahattin Doruk Yildön, Utku Tuncel, S. Topaloglu\",\"doi\":\"10.1109/SIU55565.2022.9864767\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work is based on 0.25-um Gallium Arsenide (GaAs) (pHEMT) process. The GaAs pHEMT process, is chosen because it has been shown the most suitable technology to provide the high output power and a reasonable stability despite its high cost. A 24 GHz radio frequency integrated circuit (RFIC) Power Amplifier that is designed and simulated. The electromagnetic (EM) simulation and layout design are performed using the AWR Design Environment from the Cadence Company. The power amplifier is designed as a 2-way combining network with Class- AB topology. This RFIC Power Amplifier design achieves a power gain of 8.08 dB, Power Added Efficiency of 37.3%, P1dB of 24.82 dBm, P3dB of 25.37 dBm and PSAT of 28.14 dBm with the size of 3.36 mm2 (1.2 mm x 2.8 mm).\",\"PeriodicalId\":115446,\"journal\":{\"name\":\"2022 30th Signal Processing and Communications Applications Conference (SIU)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-05-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 30th Signal Processing and Communications Applications Conference (SIU)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIU55565.2022.9864767\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 30th Signal Processing and Communications Applications Conference (SIU)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIU55565.2022.9864767","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
这项工作是基于0.25微米砷化镓(GaAs) (pHEMT)工艺。之所以选择GaAs pHEMT工艺，是因为它已经被证明是最合适的技术，可以提供高输出功率和合理的稳定性，尽管它的成本很高。设计并仿真了一种24ghz射频集成电路(RFIC)功率放大器。电磁(EM)仿真和布局设计使用Cadence公司的AWR设计环境进行。该功率放大器被设计成AB类拓扑的双向组合网络。该RFIC功率放大器的功率增益为8.08 dB，功率附加效率为37.3%，P1dB为24.82 dBm, P3dB为25.37 dBm, PSAT为28.14 dBm，尺寸为3.36 mm2 (1.2 mm x 2.8 mm)。
A 24 GHz RFIC Power Amplifier Design in 0.25-um GaAs pHEMT Process
This work is based on 0.25-um Gallium Arsenide (GaAs) (pHEMT) process. The GaAs pHEMT process, is chosen because it has been shown the most suitable technology to provide the high output power and a reasonable stability despite its high cost. A 24 GHz radio frequency integrated circuit (RFIC) Power Amplifier that is designed and simulated. The electromagnetic (EM) simulation and layout design are performed using the AWR Design Environment from the Cadence Company. The power amplifier is designed as a 2-way combining network with Class- AB topology. This RFIC Power Amplifier design achieves a power gain of 8.08 dB, Power Added Efficiency of 37.3%, P1dB of 24.82 dBm, P3dB of 25.37 dBm and PSAT of 28.14 dBm with the size of 3.36 mm2 (1.2 mm x 2.8 mm).
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
