An improved SHM-PAM method to meet EN 50160 and CIGRE WG 36-05 voltage harmonic standards using asymmetrical cascaded H-bridge natural sequence multi-level inverter structure

An improved selective-harmonic-minimisation pulse-amplitude-modulation (SHM-PAM) method based on quarter-wave-symmetry (QWS) waveform for a three-phase seven-level asymmetrical CHB natural-sequence-multi-level-inverter (CHBNSMLI) is presented in this article. The proposed SHM-PAM method is capable of keeping the value of the harmonic components of inverter output voltage (up to 25th order) and THD under the specified limit of voltage harmonic standards EN50160/CIGRE WG 36-05. In the proposed strategy, the first and second cell of the typical two-cell asymmetrical CHBNSMLI commutates once and thrice per quarter cycle respectively. The solution of switching positions and per unit voltages of each level is estimated using the particle swarm optimisation (PSO) technique. The performance of the suggested technique is then justified through simulation as well as hardware implementation on an FPGA-controlled asymmetrical CHBNSMLI for different loading conditions. Lastly, the effectiveness of the proposed SHM-PAM method has been established through a comparative study with some existing SHE/SHM methods.