Analysis of Charge Plasma Based Hetero Junction Nanowire Multi Channel Field Effect Transistor for Sub 10 nm

This paper describes the design and development of a Nano Wire Multi Channel Field Effect Transistor (NWMCFET) with a gate length of 5 nm. The NWMCFET is created by splitting the Nanowire MCFET into four channels, and the charge plasma concept is employed during the design process using the Sentaurus TCAD simulation tool. To enhance the performance of the NWMCFET, Silicon Carbide (SiC) is utilized for the source and drain regions. The integration of SiC, combined with the utilization of a multi-bridge channel and the device's Ultra-Thin Body (UTB) technology, leads to an increased current drive capability. The Cur-rent-Voltage ( I-V ) characteristics of the device are plotted, and it is observed that these techniques result in a notable enhancement in current drive and overall performance. Additionally, the inclusion of hetero junction phenomena in the NWMCFET design further improves its performance. Consequently, the device incorporating the multi-channel and electrostatic doping idea demonstrates comparable results to manually doped devices. This finding highlights the potential of the proposed device design. Particularly, in the context of sub-10 nm devices, further development in this direction holds significant advantages. In summary, this paper presents a comprehensive exploration of a Nano Wire Multi Channel Field Effect Transistor design, utilizing the charge plasma concept, SiC material, and a multi-bridge channel configuration. The experimental results indicate improved current drive and overall device performance. Furthermore, the incorporation of hetero junction phenomena is found to be beneficial. The proposed design offers promising prospects for the development of sub-10 nm devices in the future.