{"title":"基于FPGA RTL编程和IP建模技术的通用模块化加法器性能分析","authors":"Tukur Gupta, Gaurav Verma, Shamim Akhter","doi":"10.18280/isi.280514","DOIUrl":null,"url":null,"abstract":"ABSTRACT","PeriodicalId":38604,"journal":{"name":"Ingenierie des Systemes d''Information","volume":"148 ","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Performance Analysis of a Generic Modular Adder via RTL Programming and IP Modeling Techniques on FPGA\",\"authors\":\"Tukur Gupta, Gaurav Verma, Shamim Akhter\",\"doi\":\"10.18280/isi.280514\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"ABSTRACT\",\"PeriodicalId\":38604,\"journal\":{\"name\":\"Ingenierie des Systemes d''Information\",\"volume\":\"148 \",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-10-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Ingenierie des Systemes d''Information\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.18280/isi.280514\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"Computer Science\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Ingenierie des Systemes d''Information","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.18280/isi.280514","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"Computer Science","Score":null,"Total":0}