NeuroHSMD:神经形态杂交脉冲运动检测器

IF 3.1 4区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE ACM Transactions on Reconfigurable Technology and Systems Pub Date : 2023-06-21 DOI:https://dl.acm.org/doi/10.1145/3588318
Pedro Machado, João Filipe Ferreira, Andreas Oikonomou, T. M. McGinnity
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引用次数: 0

摘要

脊椎动物的视网膜在处理琐碎的视觉任务时效率很高,比如检测移动的物体,这对现代计算机来说仍然是一个复杂的挑战。在脊椎动物中,物体运动的检测是由称为物体运动敏感神经节细胞(OMS-GC)的特殊视网膜细胞完成的。OMS-GC处理连续的视觉信号并产生由视觉皮层后处理的脉冲模式。我们之前的混合敏感运动检测器(HSMD)算法是第一个使用定制的3层峰值神经网络(SNN)增强背景减法(BS)算法的混合算法,该算法可以产生类似OMS-GC峰值的响应。在这项工作中,我们提出了一种神经形态混合敏感运动检测器(NeuroHSMD)算法,该算法使用现场可编程门阵列(fpga)加速了我们的HSMD算法。使用相同的2012年变化检测(CDnet2012)和2014年变化检测(CDnet2014)基准数据集,将NeuroHSMD与HSMD算法进行比较。在针对CDnet2012和CDnet2014数据集进行测试时,NeuroHSMD分别以28.06帧/秒(fps)的720 × 480和28.71帧/秒(fps)的720 × 480进行物体运动检测,质量没有下降。此外,本文提出的NeuroHSMD完全是在开放计算机语言(OpenCL)中实现的,因此很容易在其他设备中复制,例如图形处理单元(gpu)和中央处理单元(cpu)集群。
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NeuroHSMD: Neuromorphic Hybrid Spiking Motion Detector

Vertebrate retinas are highly-efficient in processing trivial visual tasks such as detecting moving objects, which still represent complex challenges for modern computers. In vertebrates, the detection of object motion is performed by specialised retinal cells named Object Motion Sensitive Ganglion Cells (OMS-GC). OMS-GC process continuous visual signals and generate spike patterns that are post-processed by the Visual Cortex. Our previous Hybrid Sensitive Motion Detector (HSMD) algorithm was the first hybrid algorithm to enhance Background subtraction (BS) algorithms with a customised 3-layer Spiking Neural Network (SNN) that generates OMS-GC spiking-like responses. In this work, we present a Neuromorphic Hybrid Sensitive Motion Detector (NeuroHSMD) algorithm that accelerates our HSMD algorithm using Field-Programmable Gate Arrays (FPGAs). The NeuroHSMD was compared against the HSMD algorithm, using the same 2012 Change Detection (CDnet2012) and 2014 Change Detection (CDnet2014) benchmark datasets. When tested against the CDnet2012 and CDnet2014 datasets, NeuroHSMD performs object motion detection at 720 × 480 at 28.06 Frames Per Second (fps) and 720 × 480 at 28.71 fps, respectively, with no degradation of quality. Moreover, the NeuroHSMD proposed in this article was completely implemented in Open Computer Language (OpenCL) and therefore is easily replicated in other devices such as Graphical Processing Units (GPUs) and clusters of Central Processing Units (CPUs).

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来源期刊
ACM Transactions on Reconfigurable Technology and Systems
ACM Transactions on Reconfigurable Technology and Systems COMPUTER SCIENCE, HARDWARE & ARCHITECTURE-
CiteScore
4.90
自引率
8.70%
发文量
79
审稿时长
>12 weeks
期刊介绍: TRETS is the top journal focusing on research in, on, and with reconfigurable systems and on their underlying technology. The scope, rationale, and coverage by other journals are often limited to particular aspects of reconfigurable technology or reconfigurable systems. TRETS is a journal that covers reconfigurability in its own right. Topics that would be appropriate for TRETS would include all levels of reconfigurable system abstractions and all aspects of reconfigurable technology including platforms, programming environments and application successes that support these systems for computing or other applications. -The board and systems architectures of a reconfigurable platform. -Programming environments of reconfigurable systems, especially those designed for use with reconfigurable systems that will lead to increased programmer productivity. -Languages and compilers for reconfigurable systems. -Logic synthesis and related tools, as they relate to reconfigurable systems. -Applications on which success can be demonstrated. The underlying technology from which reconfigurable systems are developed. (Currently this technology is that of FPGAs, but research on the nature and use of follow-on technologies is appropriate for TRETS.) In considering whether a paper is suitable for TRETS, the foremost question should be whether reconfigurability has been essential to success. Topics such as architecture, programming languages, compilers, and environments, logic synthesis, and high performance applications are all suitable if the context is appropriate. For example, an architecture for an embedded application that happens to use FPGAs is not necessarily suitable for TRETS, but an architecture using FPGAs for which the reconfigurability of the FPGAs is an inherent part of the specifications (perhaps due to a need for re-use on multiple applications) would be appropriate for TRETS.
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