MODELING THE INFLUENCE OF COMPONENTS LEAKAGE CURRENTS ON THE ACCURACY OF THE RECURRENT LADCS

This work is dedicated to the investigation of errors in the recurrent logarithmic analog-to-digital converters (LADC). A generalized structural diagram of the recurrent LADC with a variable logarithmic base is provided. The implementation features and operating principles are explained. Models of the recurrent LADCs that account for the influence of component leakage currents in the converter circuits have been developed. The models consider changes in the structure of the recurrent LADCs during the conversion process. To improve the speed of LADCs, analog switches with an operational amplifier have been used, reducing the switch resistance in the ON state. This increased the clock frequency to 500 kHz, but also increased leakage currents. For the developed 8-bit the recurrent LADCs operating with 10 – and 12-bit output code precision, errors from leakage currents do not exceed (0.45 and 1.37)× 10-3 % for conversion times not exceeding (28 and 78) μs (14 and 39 conversion cycles). Increasing the resolution of the LADCs and their output code results in an increase in these mentioned errors, but they remain significantly smaller than the corresponding quantization errors. However, with each 2 bits of increased precision, the conversion time of the recurrent LADCs increases by 1,5 times. Therefore, increasing precision by more than 2-4 bits is not practical. Key words: recurrent logarithmic ADCs, modeling, leakade current, speed, accuracy