DisLog:用于解缠的分离逻辑

IF 2.2 Q2 COMPUTER SCIENCE, SOFTWARE ENGINEERING Proceedings of the ACM on Programming Languages Pub Date : 2024-01-05 DOI:10.1145/3632853
Alexandre Moine, Sam Westrick, Stephanie Balzer
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引用次数: 0

摘要

互不干涉是并行程序的一种运行时属性,它有助于对并行任务的内存足迹进行任务本地推理。特别是,它能确保一个任务不会访问另一个并发执行任务分配的任何内存位置。例如,可以利用反缠来实现高性能并行内存管理器,如并行 ML 的 MPL(MaPLe)编译器。之前关于反纠缠的研究主要集中在优化设计上,要么相信程序员能提供反纠缠程序,要么依赖运行时工具来检测和管理纠缠。本文提供了第一种静态方法来验证程序是否解缠:它贡献了一种用于解缠的并发分离逻辑--DisLog。DisLog 利用推理并行程序的叉连接结构所需的概念丰富了并发分离逻辑,从而可以验证内存访问是否被有效地分离。包括无竞赛程序在内的一大类程序表现出 "通过构造 "而被分解的内存访问模式。为了推理这些模式,本文从 DisLog 中提炼出一种几乎标准的并发分离逻辑,称为 DisLog+。在这种高级逻辑中,不需要对内存访问进行具体推理:功能正确性证明必然会产生分离。本文在一系列案例研究中说明了 DisLog 和 DisLog+ 的使用,包括通过并发散列实现并行重复数据删除的两种不同实现。我们的所有结果都通过 Iris 在 Coq 证明助手中实现了机械化。
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DisLog: A Separation Logic for Disentanglement
Disentanglement is a run-time property of parallel programs that facilitates task-local reasoning about the memory footprint of parallel tasks. In particular, it ensures that a task does not access any memory locations allocated by another concurrently executing task. Disentanglement can be exploited, for example, to implement a high-performance parallel memory manager, such as in the MPL (MaPLe) compiler for Parallel ML. Prior research on disentanglement has focused on the design of optimizations, either trusting the programmer to provide a disentangled program or relying on runtime instrumentation for detecting and managing entanglement. This paper provides the first static approach to verify that a program is disentangled: it contributes DisLog, a concurrent separation logic for disentanglement. DisLog enriches concurrent separation logic with the notions necessary for reasoning about the fork-join structure of parallel programs, allowing the verification that memory accesses are effectively disentangled. A large class of programs, including race-free programs, exhibit memory access patterns that are disentangled "by construction". To reason about these patterns, the paper distills from DisLog an almost standard concurrent separation logic, called DisLog+. In this high-level logic, no specific reasoning about memory accesses is needed: functional correctness proofs entail disentanglement. The paper illustrates the use of DisLog and DisLog+ on a range of case studies, including two different implementations of parallel deduplication via concurrent hashing. All our results are mechanized in the Coq proof assistant using Iris.
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来源期刊
Proceedings of the ACM on Programming Languages
Proceedings of the ACM on Programming Languages Engineering-Safety, Risk, Reliability and Quality
CiteScore
5.20
自引率
22.20%
发文量
192
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