一石二鸟:低功耗 SRAM 存储器的差异化隐私保护

IF 7 2区 计算机科学 Q1 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Transactions on Dependable and Secure Computing Pub Date : 2024-03-26 DOI:10.1109/tdsc.2024.3382630
Jianqing Liu, Na Gong, Hritom Das
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引用次数: 0

摘要

事实证明,基于软件的差分隐私机制既不适合轻量级设备,也不能安全地抵御侧信道攻击。在这项工作中,我们旨在开发一种基于硬件的技术,通过设计实现差分隐私。与传统的基于软件的噪声生成和注入过程相反,我们的设计是在数据存储到内存中时,利用固有的硬件噪声转化为受控的 LDP 噪声,从而实现局部差分隐私(LDP)。具体来说,我们通过新颖的内存设计和功率缩减技术来控制噪声,从而在隐私和能效方面实现双赢。本文介绍了一项全面的研究,包括理论设计和分析以及芯片实现和实验。结果证实,所开发的技术具有不同程度的私密性,可节省 88.58% 的系统功耗,将基于软件的 DP 机制的速度提高了 10^6 倍以上,同时仅产生 2.46% 的芯片开销和 7.81% 的数据恢复估计误差。
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Two Birds with One Stone: Differential Privacy by Low-power SRAM Memory
The software-based implementation of differential privacy mechanisms has been shown to be neither friendly for lightweight devices nor secure against side-channel attacks. In this work, we aim to develop a hardware-based technique to achieve differential privacy by design. In contrary to the conventional software-based noise generation and injection process, our design realizes local differential privacy (LDP) by harnessing the inherent hardware noise into controlled LDP noise when data is stored in the memory. Specifically, the noise is tamed through a novel memory design and power downscaling technique, which leads to double-faceted gains in privacy and power efficiency. A well-round study that consists of theoretical design and analysis and chip implementation and experiments is presented. The results confirm that the developed technique is differentially private, saves 88.58% system power, speeds up software-based DP mechanisms by more than 10^6 times, while only incurring 2.46% chip overhead and 7.81% estimation errors in data recovery.
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来源期刊
IEEE Transactions on Dependable and Secure Computing
IEEE Transactions on Dependable and Secure Computing 工程技术-计算机:软件工程
CiteScore
11.20
自引率
5.50%
发文量
354
审稿时长
9 months
期刊介绍: The "IEEE Transactions on Dependable and Secure Computing (TDSC)" is a prestigious journal that publishes high-quality, peer-reviewed research in the field of computer science, specifically targeting the development of dependable and secure computing systems and networks. This journal is dedicated to exploring the fundamental principles, methodologies, and mechanisms that enable the design, modeling, and evaluation of systems that meet the required levels of reliability, security, and performance. The scope of TDSC includes research on measurement, modeling, and simulation techniques that contribute to the understanding and improvement of system performance under various constraints. It also covers the foundations necessary for the joint evaluation, verification, and design of systems that balance performance, security, and dependability. By publishing archival research results, TDSC aims to provide a valuable resource for researchers, engineers, and practitioners working in the areas of cybersecurity, fault tolerance, and system reliability. The journal's focus on cutting-edge research ensures that it remains at the forefront of advancements in the field, promoting the development of technologies that are critical for the functioning of modern, complex systems.
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