采用体隔离技术的 Ku 波段低电压、低功耗 CMOS 低噪声放大器

Zifeng Guo, Jian Liu
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摘要

本文介绍了一种采用 65 纳米 CMOS 技术、用于卫星通信的宽带(12-18G)低噪声放大器(LNA)。该 LNA 采用带电感变性拓扑的级联共源设计。此外,还采用了体隔离技术,使所提出的 LNA 具有更高的增益。此外,两级级联配置与电感并联峰值技术相结合,使 LNA 实现了宽工作频带。为了进行验证,我们采用 65nm CMOS 技术设计了这款 LNA。仿真结果表明,S21 为 17.7dB ± 0.5dB,输入/输出回波损耗分别为 -10dB 至 -33dB 和 -12dB 至 -23dB。它的最小噪声系数(NF)为 3.33dB,反向隔离度(S12)优于 60dB,三阶输入点(IIP3)在相关频段内为 -22.8 dBm。不包括输出缓冲级,该 LNA 在 0.8V 电源电压下的功耗为 5.1 mW,布局面积为 0.205 mm2。
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A Ku band low-voltage and low-power CMOS low-noise amplifier with bulk isolation techniques
In this paper, a broadband(12-18G) low-noise amplifier (LNA) using 65-nm CMOS technology for satellite communication is presented. This LNA was designed in a cascode common source with inductive degeneration topology. In addition, the bulk isolation technique is employed to make the proposed LNA have a higher gain. Furthermore, a two-stage cascaded configuration combined with inductive parallel peaking technology is utilized to make the LNA achieve a wide operating band. For validation, we design this LNA in a 65nm CMOS technology. The simulated results show that S21 of 17.7dB ± 0.5dB, the input/output return loss of -10dB to -33dB and -12dB to -23dB, respectively. It offers the minimum noise figure (NF) performance of 3.33dB, reverse isolation(S12) better than 60dB, and third-order input point (IIP3) of -22.8 dBm obtained over the band of interest. Excluding the output buffer stage, the LNA is consuming 5.1 mW at a supply voltage of 0.8V and its layout area occupies 0.205 mm2.
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