基于 Verilog 的高速低功耗 UART 的设计与实现

Ms. Banti Kumari, Ms. Kanika Jindal, Mr. Amit Bindal
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引用次数: 0

摘要

串行通信最关键的组件是一种称为通用异步接收器/发送器(UART)的微电路。接收-发送器异步技术被称为 UART,广泛应用于设备到设备的通信协议。使用可调节速度的异步串行通信。一种名为 UART 的硬件通信技术 当发送设备和接收端的输出与时钟不同步时,就会出现异步情况。在 UART 中,接收信号称为 RxD,发送信号称为 TxD。与现有的传统 UART 设计相比,我们的方法能将延迟减少 29%,功耗降低 33%。新型 UART 设计的有效性体现在延迟和功耗的降低上。合成和仿真在 Xilinx ISE 和 Modelsim 中完成,并使用 Verilog HDL 实现了独特的 UART 设计。
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Design and Implementation of Verilog Based High Speed Low Power UART
The most crucial component of serial communication is a microcircuit called a universal asynchronous receiver/transmitter (UART). Receive-transmitter asynchronous technology is known as UART, and it is widely used for device-to-device communication protocols. Using asynchronous serial communication at a speed that can be adjusted. A hardware communication technique called UART Asynchronous conditions occur when the output of the transmitting device and the receiving end are not in sync with a clock. In UART, receiving a signal is known as RxD, and transmitting a signal is known as TxD. In comparison to the existing conventional UART design, we were able to reduce delay by 29% and power usage by 33% using our approach. The effectiveness of the novel UART design is noticed with the reduction in delay and power consumption. Synthesis and simulation are done in Xilinx ISE and Modelsim and Verilog HDL is used to implement a unique UART design.
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