Ms. Banti Kumari, Ms. Kanika Jindal, Mr. Amit Bindal
{"title":"基于 Verilog 的高速低功耗 UART 的设计与实现","authors":"Ms. Banti Kumari, Ms. Kanika Jindal, Mr. Amit Bindal","doi":"10.47392/irjaeh.2024.0203","DOIUrl":null,"url":null,"abstract":"The most crucial component of serial communication is a microcircuit called a universal asynchronous receiver/transmitter (UART). Receive-transmitter asynchronous technology is known as UART, and it is widely used for device-to-device communication protocols. Using asynchronous serial communication at a speed that can be adjusted. A hardware communication technique called UART Asynchronous conditions occur when the output of the transmitting device and the receiving end are not in sync with a clock. In UART, receiving a signal is known as RxD, and transmitting a signal is known as TxD. In comparison to the existing conventional UART design, we were able to reduce delay by 29% and power usage by 33% using our approach. The effectiveness of the novel UART design is noticed with the reduction in delay and power consumption. Synthesis and simulation are done in Xilinx ISE and Modelsim and Verilog HDL is used to implement a unique UART design.","PeriodicalId":517766,"journal":{"name":"International Research Journal on Advanced Engineering Hub (IRJAEH)","volume":"2 11","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2024-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and Implementation of Verilog Based High Speed Low Power UART\",\"authors\":\"Ms. Banti Kumari, Ms. Kanika Jindal, Mr. Amit Bindal\",\"doi\":\"10.47392/irjaeh.2024.0203\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The most crucial component of serial communication is a microcircuit called a universal asynchronous receiver/transmitter (UART). Receive-transmitter asynchronous technology is known as UART, and it is widely used for device-to-device communication protocols. Using asynchronous serial communication at a speed that can be adjusted. A hardware communication technique called UART Asynchronous conditions occur when the output of the transmitting device and the receiving end are not in sync with a clock. In UART, receiving a signal is known as RxD, and transmitting a signal is known as TxD. In comparison to the existing conventional UART design, we were able to reduce delay by 29% and power usage by 33% using our approach. The effectiveness of the novel UART design is noticed with the reduction in delay and power consumption. Synthesis and simulation are done in Xilinx ISE and Modelsim and Verilog HDL is used to implement a unique UART design.\",\"PeriodicalId\":517766,\"journal\":{\"name\":\"International Research Journal on Advanced Engineering Hub (IRJAEH)\",\"volume\":\"2 11\",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2024-05-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Research Journal on Advanced Engineering Hub (IRJAEH)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.47392/irjaeh.2024.0203\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Research Journal on Advanced Engineering Hub (IRJAEH)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.47392/irjaeh.2024.0203","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and Implementation of Verilog Based High Speed Low Power UART
The most crucial component of serial communication is a microcircuit called a universal asynchronous receiver/transmitter (UART). Receive-transmitter asynchronous technology is known as UART, and it is widely used for device-to-device communication protocols. Using asynchronous serial communication at a speed that can be adjusted. A hardware communication technique called UART Asynchronous conditions occur when the output of the transmitting device and the receiving end are not in sync with a clock. In UART, receiving a signal is known as RxD, and transmitting a signal is known as TxD. In comparison to the existing conventional UART design, we were able to reduce delay by 29% and power usage by 33% using our approach. The effectiveness of the novel UART design is noticed with the reduction in delay and power consumption. Synthesis and simulation are done in Xilinx ISE and Modelsim and Verilog HDL is used to implement a unique UART design.