Aberdeen architecture: information flow monitoring and tracking

Saltzer and Schroeder’s security principles define complete mediation as to verify all access rights and authority. Conventional architectures focus on speed at all costs using predictors, caches, out-of-order execution, speculative execution, etc. A new approach is required to overcome the limitations of conventional architectures: the clock speed differential between a microprocessor and memory, and the resulting self-imposed, never-ending cyber security problems. The Aberdeen Architecture uses the cache bank pipeline memory architecture from the Redstone Architecture to overcome some of the speed differential between a microprocessor and memory. The trusted computing base uses hardware state machine monitors (hardware-based nano-operating system kernels). The state machine monitors use register and memory tags to manage and track information flows during instruction execution. The Aberdeen Architecture tracks and monitors four information flows: data flow integrity, memory access flow integrity, control flow integrity, and instruction execution flow integrity. All information flows are data flow driven. The state machine monitors completely virtualize the execution pipeline. The Aberdeen Architecture achieves near complete mediation for instruction execution. This paper focuses on data flow integrity and memory access flow integrity.