{"title":"基于 SiNWFET 的尿酸酶和 ChOX 生物传感器周围三重混合栅优化介质调制无结栅的数值建模","authors":"Rishu Chaujar, Mekonnen Getnet Yirak","doi":"10.1007/s00542-024-05705-z","DOIUrl":null,"url":null,"abstract":"<p>In this manuscript, a numerical model based on the electric field, threshold voltage, sub-threshold current, and electrostatic potential in cylindrical coordinates using Poisson’s equation for triple hybrid metal (THM) gate dielectric modulated junctionless silicon-nanowire gate all around FET based uricase and ChO<sub>X</sub> biosensor was developed at 40 nm technology (20 nm gate length) to study different gate engineering optimization effects on the performance of the proposed device. The results of the ATLAS-3D TCAD\" device simulator agreed with a derived analytical model. Three types of gate optimization (gate engineering) are denoted by M<sub>ϕ</sub> (4.86, 4.96 and 4.50 eV), O<sub>ϕ</sub> (4.96, 4.86 and 4.50 eV), and Q<sub>ϕ</sub> (4.86, 4.50 and 4.96 eV) each have three different metal work-function, including uricase and cholesterol oxidase (ChO<sub>X</sub>) biomolecules have been coated in the nanocavity to determine their impact on the device performance and also, the effect of nanogap cavity length on the proposed device was examined taking numerous simulations. Our findings conclude that nanocavity coated with ChO<sub>X</sub> dielectric and having tunable work-function optimized at “O” signifies better output results in the device sensitivity, shifting threshold voltage, switching ratio, transconductance, intrinsic voltage gain, and device efficiency. For instance, the switching ratio in the case of ChO<sub>X</sub> biomolecule for M, O, and Q gate optimizations are 5.22 × 10<sup>5</sup>, 1.36 × 10<sup>6</sup>, and 2.18 × 10<sup>4</sup>, respectively. We conclude that the proposed devices with optimizing gate work function at “O” suggest new opportunities for future ultra-large-scale integration (ULSI) development to achieve highly efficient device performance.</p>","PeriodicalId":18544,"journal":{"name":"Microsystem Technologies","volume":"8 1","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2024-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Numerical modelling for triple hybrid gate optimization dielectric modulated junctionless gate all around SiNWFET based uricase and ChOX biosensor\",\"authors\":\"Rishu Chaujar, Mekonnen Getnet Yirak\",\"doi\":\"10.1007/s00542-024-05705-z\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p>In this manuscript, a numerical model based on the electric field, threshold voltage, sub-threshold current, and electrostatic potential in cylindrical coordinates using Poisson’s equation for triple hybrid metal (THM) gate dielectric modulated junctionless silicon-nanowire gate all around FET based uricase and ChO<sub>X</sub> biosensor was developed at 40 nm technology (20 nm gate length) to study different gate engineering optimization effects on the performance of the proposed device. The results of the ATLAS-3D TCAD\\\" device simulator agreed with a derived analytical model. Three types of gate optimization (gate engineering) are denoted by M<sub>ϕ</sub> (4.86, 4.96 and 4.50 eV), O<sub>ϕ</sub> (4.96, 4.86 and 4.50 eV), and Q<sub>ϕ</sub> (4.86, 4.50 and 4.96 eV) each have three different metal work-function, including uricase and cholesterol oxidase (ChO<sub>X</sub>) biomolecules have been coated in the nanocavity to determine their impact on the device performance and also, the effect of nanogap cavity length on the proposed device was examined taking numerous simulations. Our findings conclude that nanocavity coated with ChO<sub>X</sub> dielectric and having tunable work-function optimized at “O” signifies better output results in the device sensitivity, shifting threshold voltage, switching ratio, transconductance, intrinsic voltage gain, and device efficiency. For instance, the switching ratio in the case of ChO<sub>X</sub> biomolecule for M, O, and Q gate optimizations are 5.22 × 10<sup>5</sup>, 1.36 × 10<sup>6</sup>, and 2.18 × 10<sup>4</sup>, respectively. We conclude that the proposed devices with optimizing gate work function at “O” suggest new opportunities for future ultra-large-scale integration (ULSI) development to achieve highly efficient device performance.</p>\",\"PeriodicalId\":18544,\"journal\":{\"name\":\"Microsystem Technologies\",\"volume\":\"8 1\",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2024-06-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microsystem Technologies\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1007/s00542-024-05705-z\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microsystem Technologies","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/s00542-024-05705-z","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Numerical modelling for triple hybrid gate optimization dielectric modulated junctionless gate all around SiNWFET based uricase and ChOX biosensor
In this manuscript, a numerical model based on the electric field, threshold voltage, sub-threshold current, and electrostatic potential in cylindrical coordinates using Poisson’s equation for triple hybrid metal (THM) gate dielectric modulated junctionless silicon-nanowire gate all around FET based uricase and ChOX biosensor was developed at 40 nm technology (20 nm gate length) to study different gate engineering optimization effects on the performance of the proposed device. The results of the ATLAS-3D TCAD" device simulator agreed with a derived analytical model. Three types of gate optimization (gate engineering) are denoted by Mϕ (4.86, 4.96 and 4.50 eV), Oϕ (4.96, 4.86 and 4.50 eV), and Qϕ (4.86, 4.50 and 4.96 eV) each have three different metal work-function, including uricase and cholesterol oxidase (ChOX) biomolecules have been coated in the nanocavity to determine their impact on the device performance and also, the effect of nanogap cavity length on the proposed device was examined taking numerous simulations. Our findings conclude that nanocavity coated with ChOX dielectric and having tunable work-function optimized at “O” signifies better output results in the device sensitivity, shifting threshold voltage, switching ratio, transconductance, intrinsic voltage gain, and device efficiency. For instance, the switching ratio in the case of ChOX biomolecule for M, O, and Q gate optimizations are 5.22 × 105, 1.36 × 106, and 2.18 × 104, respectively. We conclude that the proposed devices with optimizing gate work function at “O” suggest new opportunities for future ultra-large-scale integration (ULSI) development to achieve highly efficient device performance.