An Efficient Image Denoising Approach Using FPGA Type of PYNQ-Z2

Image denoising techniques have become crucial for computer-assisted analysis due to the increasing number of digital images captured in unfavorable conditions. In various fields such as image recognition, medical imaging, robotics, and facial expression analysis, the presence of noise poses significant challenges for denoising algorithms. One of the key difficulties is distinguishing between edges, textures, and noise, all of which contain high-frequency components. Haar Wavelet Transform (HWT) has emerged as a highly effective technique for image denoising. The proposed study focuses on two denoising methods: HWT and HWT-FPGA. Experimental evaluations are conducted to assess the denoising performance of the HWT model and the efficiency of its implementation on a Field-Programmable Gate Array (FPGA). Quantitative metrics, such as Peak Signal-to-Noise Ratio (PSNR) and Mean Square Error (MSE), are used to measure the denoising quality for ten test images of size 255x255 pixels. Additionally, computational metrics, including processing speed and resource utilization, are analyzed to evaluate the efficiency of the FPGA implementation. The research specifically supports PYNQ, an open-source framework that enables embedded programmers to explore the capabilities of Xilinx ZYNQ SoCs without the need for VHDL programming. In this context, the PYNQ-Z2 FPGA development board, based on the ZYNQ XC7Z020 FPGA, is chosen for the proposed system. The experimental results demonstrate that the HWT and HWT-FPGA approach significantly improve denoising performance compared to traditional methods. The denoised images exhibit higher PSNR values and low MSE scores, indicating better preservation of image details and similarity to the clean images. Furthermore, the FPGA implementation showcases remarkable computational efficiency, enabling real-time denoising capabilities while effectively utilizing FPGA resources.