基于保证金计算的可扩展瞬时宽带射频相关器

IF 4.6 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Journal of Solid-state Circuits Pub Date : 2024-10-03 DOI:10.1109/JSSC.2024.3465244
Kareem Rashed;Aswin Undavalli;Shantanu Chakrabartty;Aravind Nagulu;Arun Natarajan
{"title":"基于保证金计算的可扩展瞬时宽带射频相关器","authors":"Kareem Rashed;Aswin Undavalli;Shantanu Chakrabartty;Aravind Nagulu;Arun Natarajan","doi":"10.1109/JSSC.2024.3465244","DOIUrl":null,"url":null,"abstract":"Correlation is a fundamental operation in radar/ communication signal processing. Enabling efficient reconfigurable correlation at high frequencies with wide bandwidths and high dynamic range is a fundamental challenge. This article presents a direct-RF wideband analog correlator that utilizes a novel margin computation paradigm replacing traditional multiply-and-accumulate (MAC) with analog addition and thresholding to enable energy-efficient analog computation. A high-efficiency charge-domain realization is proposed and implemented in 65-nm CMOS occupying 0.97 mm2. The analog correlator IC supports 5-GS/s inputs, a large correlation length of 1024, and 8-bit computing accuracy with a high energy efficiency of 152 TOPS/W. Practical applications of typical high-speed correlation are also demonstrated through system-level measurements such as radar signal detection, and code-domain processing.","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"59 11","pages":"3612-3626"},"PeriodicalIF":4.6000,"publicationDate":"2024-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Scalable and Instantaneously Wideband RF Correlator Based on Margin Computing\",\"authors\":\"Kareem Rashed;Aswin Undavalli;Shantanu Chakrabartty;Aravind Nagulu;Arun Natarajan\",\"doi\":\"10.1109/JSSC.2024.3465244\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Correlation is a fundamental operation in radar/ communication signal processing. Enabling efficient reconfigurable correlation at high frequencies with wide bandwidths and high dynamic range is a fundamental challenge. This article presents a direct-RF wideband analog correlator that utilizes a novel margin computation paradigm replacing traditional multiply-and-accumulate (MAC) with analog addition and thresholding to enable energy-efficient analog computation. A high-efficiency charge-domain realization is proposed and implemented in 65-nm CMOS occupying 0.97 mm2. The analog correlator IC supports 5-GS/s inputs, a large correlation length of 1024, and 8-bit computing accuracy with a high energy efficiency of 152 TOPS/W. Practical applications of typical high-speed correlation are also demonstrated through system-level measurements such as radar signal detection, and code-domain processing.\",\"PeriodicalId\":13129,\"journal\":{\"name\":\"IEEE Journal of Solid-state Circuits\",\"volume\":\"59 11\",\"pages\":\"3612-3626\"},\"PeriodicalIF\":4.6000,\"publicationDate\":\"2024-10-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Journal of Solid-state Circuits\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10704783/\",\"RegionNum\":1,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of Solid-state Circuits","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10704783/","RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

相关性是雷达/通信信号处理中的一项基本操作。在高频率、宽带宽和高动态范围内实现高效的可重构相关性是一项基本挑战。本文介绍了一种直接射频宽带模拟相关器,该相关器利用新颖的裕量计算范式,用模拟加法和阈值处理取代了传统的乘法累加(MAC),从而实现了高能效模拟计算。该器件采用 65 纳米 CMOS 实现,占地 0.97 平方毫米。该模拟相关器集成电路支持 5-GS/s 输入、1024 的大相关长度和 8 位计算精度,能效高达 152 TOPS/W。通过雷达信号检测和码域处理等系统级测量,还展示了典型高速相关性的实际应用。
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A Scalable and Instantaneously Wideband RF Correlator Based on Margin Computing
Correlation is a fundamental operation in radar/ communication signal processing. Enabling efficient reconfigurable correlation at high frequencies with wide bandwidths and high dynamic range is a fundamental challenge. This article presents a direct-RF wideband analog correlator that utilizes a novel margin computation paradigm replacing traditional multiply-and-accumulate (MAC) with analog addition and thresholding to enable energy-efficient analog computation. A high-efficiency charge-domain realization is proposed and implemented in 65-nm CMOS occupying 0.97 mm2. The analog correlator IC supports 5-GS/s inputs, a large correlation length of 1024, and 8-bit computing accuracy with a high energy efficiency of 152 TOPS/W. Practical applications of typical high-speed correlation are also demonstrated through system-level measurements such as radar signal detection, and code-domain processing.
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来源期刊
IEEE Journal of Solid-state Circuits
IEEE Journal of Solid-state Circuits 工程技术-工程:电子与电气
CiteScore
11.00
自引率
20.40%
发文量
351
审稿时长
3-6 weeks
期刊介绍: The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.
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Modular DR-and CMR-Boosted Artifact-Resilient EEG Headset With Distributed Pulse-Based Feature Extraction and Neuro-Inspired Boosted-SVM Classifier Table of Contents Table of Contents IEEE Journal of Solid-State Circuits Publication Information Guest Editorial Introduction to the Special Section on the 2024 IEEE International Solid-State Circuits Conference (ISSCC)
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