{"title":"基于保证金计算的可扩展瞬时宽带射频相关器","authors":"Kareem Rashed;Aswin Undavalli;Shantanu Chakrabartty;Aravind Nagulu;Arun Natarajan","doi":"10.1109/JSSC.2024.3465244","DOIUrl":null,"url":null,"abstract":"Correlation is a fundamental operation in radar/ communication signal processing. Enabling efficient reconfigurable correlation at high frequencies with wide bandwidths and high dynamic range is a fundamental challenge. This article presents a direct-RF wideband analog correlator that utilizes a novel margin computation paradigm replacing traditional multiply-and-accumulate (MAC) with analog addition and thresholding to enable energy-efficient analog computation. A high-efficiency charge-domain realization is proposed and implemented in 65-nm CMOS occupying 0.97 mm2. The analog correlator IC supports 5-GS/s inputs, a large correlation length of 1024, and 8-bit computing accuracy with a high energy efficiency of 152 TOPS/W. Practical applications of typical high-speed correlation are also demonstrated through system-level measurements such as radar signal detection, and code-domain processing.","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"59 11","pages":"3612-3626"},"PeriodicalIF":4.6000,"publicationDate":"2024-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Scalable and Instantaneously Wideband RF Correlator Based on Margin Computing\",\"authors\":\"Kareem Rashed;Aswin Undavalli;Shantanu Chakrabartty;Aravind Nagulu;Arun Natarajan\",\"doi\":\"10.1109/JSSC.2024.3465244\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Correlation is a fundamental operation in radar/ communication signal processing. Enabling efficient reconfigurable correlation at high frequencies with wide bandwidths and high dynamic range is a fundamental challenge. This article presents a direct-RF wideband analog correlator that utilizes a novel margin computation paradigm replacing traditional multiply-and-accumulate (MAC) with analog addition and thresholding to enable energy-efficient analog computation. A high-efficiency charge-domain realization is proposed and implemented in 65-nm CMOS occupying 0.97 mm2. The analog correlator IC supports 5-GS/s inputs, a large correlation length of 1024, and 8-bit computing accuracy with a high energy efficiency of 152 TOPS/W. Practical applications of typical high-speed correlation are also demonstrated through system-level measurements such as radar signal detection, and code-domain processing.\",\"PeriodicalId\":13129,\"journal\":{\"name\":\"IEEE Journal of Solid-state Circuits\",\"volume\":\"59 11\",\"pages\":\"3612-3626\"},\"PeriodicalIF\":4.6000,\"publicationDate\":\"2024-10-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Journal of Solid-state Circuits\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10704783/\",\"RegionNum\":1,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of Solid-state Circuits","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10704783/","RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
A Scalable and Instantaneously Wideband RF Correlator Based on Margin Computing
Correlation is a fundamental operation in radar/ communication signal processing. Enabling efficient reconfigurable correlation at high frequencies with wide bandwidths and high dynamic range is a fundamental challenge. This article presents a direct-RF wideband analog correlator that utilizes a novel margin computation paradigm replacing traditional multiply-and-accumulate (MAC) with analog addition and thresholding to enable energy-efficient analog computation. A high-efficiency charge-domain realization is proposed and implemented in 65-nm CMOS occupying 0.97 mm2. The analog correlator IC supports 5-GS/s inputs, a large correlation length of 1024, and 8-bit computing accuracy with a high energy efficiency of 152 TOPS/W. Practical applications of typical high-speed correlation are also demonstrated through system-level measurements such as radar signal detection, and code-domain processing.
期刊介绍:
The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.