BIDS:在低成本 FPGA 上使用两级二值化神经网络的高效车载网络入侵检测系统

IF 3.7 2区 计算机科学 Q1 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE Journal of Systems Architecture Pub Date : 2024-10-05 DOI:10.1016/j.sysarc.2024.103285
Auangkun Rangsikunpum, Sam Amiri, Luciano Ost
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引用次数: 0

摘要

随着支持汽车智能化的电子控制单元(ECU)数量不断增加,汽车网络对于确保安全至关重要。控制器区域网络(CAN)通常用于 ECU 之间的高效车内通信。然而,其广播性质和专用安全层的缺乏使其容易受到攻击。本文提出了一种新颖的 CAN 总线入侵检测系统(IDS),名为基于 BNN 的 IDS(BIDS),它利用分层的两级二值化神经网络(BNN)和生成对抗网络(GAN),有效地提供未知攻击检测和已知攻击分类。BIDS 在三个数据集上进行了验证,其实现在低成本现场可编程门阵列 (FPGA) 上以最小的资源利用率实现了小于 0.170 毫秒的平均推理时间。这种快速的推理速度可利用滑动窗口技术对单个 CAN 报文进行实时推理,无需等待数据预处理所需的多个累积 CAN 报文。评估指标表明,我们的 IDS 在识别未见攻击和对已知攻击进行分类方面都达到了很高的准确率。此外,我们的 FPGA 实现仅消耗 2.09 W,与基于 FPGA 的尖端 IDS 相比降低了 57%,后者能够使用相同的数据集检测未知攻击。
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BIDS: An efficient Intrusion Detection System for in-vehicle networks using a two-stage Binarised Neural Network on low-cost FPGA
Automotive networks are crucial for ensuring safety as the number of Electronic Control Units (ECUs) grows to support vehicle intelligence. The Controller Area Network (CAN) is commonly used for efficient in-vehicle communication among ECUs. However, its broadcast nature and lack of a dedicated security layer make it vulnerable to attacks. This paper proposes a novel CAN bus Intrusion Detection System (IDS), named BNN-based IDS (BIDS), which efficiently provides both unknown attack detection and known attack classification using a hierarchical two-stage Binarised Neural Network (BNN) and Generative Adversarial Network (GAN). BIDS was validated on three datasets, and its implementation achieves an average inference time of less than 0.170 ms with minimal resource utilisation on a low-cost Field Programmable Gate Array (FPGA). This rapid inference speed enables real-time inference on individual CAN messages using a sliding window technique, eliminating the need to wait for multiple accumulated CAN messages required for data preprocessing. Evaluation metrics demonstrate that our IDS achieves high accuracy in both identifying unseen attacks and categorising known attacks. Furthermore, our FPGA implementation consumes merely 2.09 W, which is a 57% reduction compared to a cutting-edge FPGA-based IDS that is capable of detecting unknown attacks using the same dataset.
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来源期刊
Journal of Systems Architecture
Journal of Systems Architecture 工程技术-计算机:硬件
CiteScore
8.70
自引率
15.60%
发文量
226
审稿时长
46 days
期刊介绍: The Journal of Systems Architecture: Embedded Software Design (JSA) is a journal covering all design and architectural aspects related to embedded systems and software. It ranges from the microarchitecture level via the system software level up to the application-specific architecture level. Aspects such as real-time systems, operating systems, FPGA programming, programming languages, communications (limited to analysis and the software stack), mobile systems, parallel and distributed architectures as well as additional subjects in the computer and system architecture area will fall within the scope of this journal. Technology will not be a main focus, but its use and relevance to particular designs will be. Case studies are welcome but must contribute more than just a design for a particular piece of software. Design automation of such systems including methodologies, techniques and tools for their design as well as novel designs of software components fall within the scope of this journal. Novel applications that use embedded systems are also central in this journal. While hardware is not a part of this journal hardware/software co-design methods that consider interplay between software and hardware components with and emphasis on software are also relevant here.
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