采用 40 纳米技术的 100-112-Gb/s 1.6 Vppd PAM-8 发射器与高摆幅 3 $+$ 1 混合 FFE 分路器

IF 5.6 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Journal of Solid-state Circuits Pub Date : 2024-11-14 DOI:10.1109/JSSC.2024.3492061
Eunji Song;Jeonghyu Yang;Youngmin Oh;Seungwook Hong;Dongjun Lee;Sangwan Lee;Hyunwoo Im;Taeho Shin;Jaeduk Han
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引用次数: 0

摘要

本文介绍了两个8级脉冲幅度调制(PAM-8)发射机(TX),它们在40纳米CMOS技术中实现了100和112 gb /s的数据速率,以及1.6峰对峰差分电压(Vppd)的高输出摆幅。采用高压驱动器,通过保护级联和放流技术提高输出摆幅电平。混合式$3{+}1$抽头前馈均衡器(FFE)实现了有效的信道均衡。在最后的4对1串行化中引入了两种类型的高速多路复用器:实现33.3 Gbaud/s的单堆栈单级多路复用器和实现37.3 Gbaud/s的两级多路复用器。采用40纳米CMOS技术制造了两个原型测试芯片,以评估所提出的多路复用器设计。发射机的PAM-8数据速率为100 Gb/s(单级多路复用器)和112 Gb/s(两级多路复用器),最坏情况下的值为45 mV和57 mV。它们的能源效率分别为3.35和4.56 pJ/bit。
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100–112-Gb/s 1.6-Vppd PAM-8 Transmitters With High-Swing 3 + 1 Hybrid FFE Taps in 40-nm Technology
This article presents two eight-level pulse amplitude modulation (PAM-8) transmitters (TX) that achieve 100- and 112-Gb/s data rates, and a high output swing of 1.6 peak-to-peak differential voltage (Vppd) in 40-nm CMOS technology. The high-voltage driver is adopted to enhance the output swing level with the protective cascode and current-bleeding techniques. The hybrid $3 {+} 1$ tap feed-forward equalizer (FFE) is implemented for efficient channel equalization. Two types of high-speed multiplexers are introduced for the final 4-to-1 serialization: a single-stack and single-stage multiplexer that achieves 33.3 Gbaud/s and a two-stage multiplexer at 37.3 Gbaud/s. Two prototype test chips are fabricated in 40-nm CMOS technology to evaluate the proposed multiplexer designs. The transmitters achieve the PAM-8 data rates of 100 Gb/s (for the single-stage multiplexer) and 112 Gb/s (for the two-stage multiplexer), with worst case eye-opening values of 45 and 57 mV. Their energy efficiencies are measured to be 3.35 and 4.56 pJ/bit.
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来源期刊
IEEE Journal of Solid-state Circuits
IEEE Journal of Solid-state Circuits 工程技术-工程:电子与电气
CiteScore
11.00
自引率
20.40%
发文量
351
审稿时长
3-6 weeks
期刊介绍: The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.
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