A novel 5.1–7.1 GHz front-end power amplifier for wireless applications with −35 dB Error Vector Magnitude

A Power Amplifier (PA) is proposed for WiFi-6E applications, specifically designed to support WLAN 802.11ax standard to achieve significant linear power. The proposed PA is designed to operate in the entire 5 GHz and 6 GHz frequency bands. The design involves a two-stage configuration, initial stage adopts a linear driver, while the subsequent amplification stage is structured as a differential cascode. UMC 65 nm CMOS process technology is used to design a PA in commercial Cadence platform. The layout occupies core area of 0.24 mm${}^2$. Proposed PA delivers a power gain of 20 dB, Power Added Efficiency (PAE) of 19% and 1 dB compression point $\left(P_{1dB}\right)$ is of 24.5 dB is achieved for continuous wave (CW) signal. For the 802.11ax source, the recorded average power output ($P_{avg}$) is 17.1 dBm at an Error Vector Magnitude (EVM) $\le -$35 dB, across the 5–7 GHz. The PA delivers $P_{avg}$ of 10 dBm at worst corner case in PVT variation analysis. While the majority of recent works in WLAN PA confines the investigation to 5 GHz band, this paper broadens the scope by extending the study by up to 7.050 GHz in 6 GHz band. The incorporation of 6GHz band enables WiFi-6E to utilize up to 1,200 MHz of unencumbered spectrum, significantly enhancing the available bandwidth relative to earlier WiFi standards. The increased bandwidth facilitates high data rate applications, such as streaming and gaming.