SiO2/Si interface defects in HKMG stack fabrication

The defect generation and recovery near the silicon dioxide (SiO₂)/silicon (Si) interface are studied throughout high-k dielectric/metal gate (HKMG) stack fabrication and post-processing. The HKMG stack is prepared on a Si wafer in a well-established manner, using chemical oxidation for an interfacial layer of SiO₂, atomic layer deposition (ALD) for HK-hafnium oxide (HfO${}_2$), and magnetron sputtering for MG-tantalum nitride (TaN). The stack is then treated with additional processing of post-deposition annealing (PDA), oxygen (O${}_2$) plasma processing, and forming gas annealing (FGA) to imitate transistor manufacturing. Throughout these processing, the atomic-level defects near the SiO₂/Si interface are characterized, with quasi-steady-state photoconductance (QSSPC) measurements. With the measurements, it is found that the defects near the SiO₂/Si interface are generated by most of the processing of ALD-HfO${}_2$, sputter-TaN as well as PDA and O${}_2$ plasma, whereas those defects are recovered by the last step of FGA. Interestingly, the recovery of defects depends on the HKMG stack structure and processing; the recovery is highly limited for a thin stack treated with high-temperature PDA. In such a case, residual defects are created near the SiO₂/Si interface.