面向未来无线链路的位对天线120 gb /s CMOS RF-64QAM发射机

IF 5.6 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Journal of Solid-state Circuits Pub Date : 2025-01-08 DOI:10.1109/JSSC.2024.3523842
Zisong Wang;Huan Wang;Youssef O. Hassan;Payam Heydari
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摘要

本文介绍了一种位对天线无线发射机(TX),完全集成在45纳米CMOS SOI中,能够超过100 gb /s的数据速率。在射频域内直接形成64QAM星座的独特方法,使用三个具有控制幅度加权的QPSK子txs,有效地减轻了高阶调制中功率放大器(PA)非线性带来的复杂性。这种战略方法为带宽和输出功率的显著增强开辟了道路。本文进一步探讨了这种TX设计的其他优点,例如本振(LO)泄漏抑制和输出功率的提高,同时介绍了电路块实现的细节。在40 ghz的射频带宽下,RF- 64qam TX原型实现了120 Gb/s的测量数据速率,有效各向同性辐射功率(EIRP)为16 dBm。
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A Bits-to-Antenna F-Band 120-Gb/s CMOS RF-64QAM Transmitter for FutureG Wireless Links
This article presents a bits-to-antenna wireless transmitter (TX), fully integrated in 45-nm CMOS SOI, capable of surpassing 100-Gb/s data rates. The unique method of directly forming the 64QAM constellation within the RF domain, using three QPSK sub-TXs with controlled amplitude weighting, effectively mitigates the complications introduced by power amplifier (PA) nonlinearity in high-order modulations. This strategic approach opens avenues for significant enhancements in bandwidth and output power. This article further explores additional advantages of this TX design, such as local oscillator (LO) leakage suppression and improved output power, while going through the specifics of circuit block implementations. With a 40-GHz RF bandwidth, the RF-64QAM TX prototype achieves a measured data rate of 120 Gb/s with an effective isotropic radiated power (EIRP) of 16 dBm.
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来源期刊
IEEE Journal of Solid-state Circuits
IEEE Journal of Solid-state Circuits 工程技术-工程:电子与电气
CiteScore
11.00
自引率
20.40%
发文量
351
审稿时长
3-6 weeks
期刊介绍: The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.
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