Numerical modeling and experimental study of thermal field and material removal for silicon wafer in final-touch polishing

With the rapid development of semiconductor industry, large-sized silicon wafers with high flatness and uniform nanotopography are generally required. Final-touch polishing (FP) is the final process in silicon wafer production, it can effectively clean the wafer's surface and control its surface geometry. The distribution of thermal field during final-touch polishing process is challenging to measure and predict, it greatly affects the characteristics and non-uniformity of material removal profile in both mechanical and chemical aspects. This study develops a numerical model to study the thermal field distribution and material removal, and used to predict the thermal characteristics and material removal profile of silicon wafer during final-touch polishing. For validation, an infrared camera and infrared sensor were applied to measure the surface temperature during polishing, and the surface material removal profile was examined and compared with model predictions. The surface material removal profile was also performed to investigate the effects of polishing parameters, including slurry flow rate, rotational speed and applied pressure. By obtaining optimal polishing parameters, final-touch polishing experiments were conducted on 12-inch silicon wafers. The experimental results showed that the polished silicon wafer has a highly flat surface with flatness of site front least square range was 23.06 nm and edge site front least square range was 23.77 nm, and the nanotopography threshold values of 2 × 2 mm² area and 10 × 10 mm² area (THA2 & THA10) for polished silicon wafer were 7.21 nm and 17.72 nm can be achieved, respectively.