Influence of Bulk Trap Properties in HfO₂-Based Ferroelectric Layers on the Transient Dynamics of Ferroelectric Field-Effect Transistors

In this study, we investigated the read-after-write-delay (RAWD) phenomenon in FeFETs by considering the influence of trap dynamics on the device characteristics. First of all, it was confirmed that it is necessary to interpret the RAWD phenomenon through bulk trap. Through extensive simulations, we also established a quantitative relationship between RAWD and bulk trap properties, such as trap level and trap density. The results indicate that both trap density and trap level play a significant role in determining the variation in ${V} _{t}$ with delay time, which in turn affects the memory window (MW) of the device. Finally, we provide guidelines on the characteristics of HfO2-based ferroelectric materials that are required to meet the MW and intrinsic speed required for various FeFET applications.