脑机接口神经元信号的低延迟多线程处理。

Frontiers in neuroengineering Pub Date : 2014-01-28 eCollection Date: 2014-01-01 DOI:10.3389/fneng.2014.00001
Jörg Fischer, Tomislav Milekovic, Gerhard Schneider, Carsten Mehring
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引用次数: 62

摘要

脑机接口(bci)需要严格的数值计算来将脑信号转换为驱动外部执行器的控制信号。提高执行这些计算的BCI算法的计算性能可以更快地对用户输入作出反应,并允许使用更苛刻的解码算法。本文介绍了一种适合BCI应用的具有多线程信号处理管道的模块化可扩展软件体系结构。在典型的BCI应用程序中,计算负载和延迟(系统对用户输入作出反应所需的时间)在具有实际参数设置的不同管道实现中被测量。我们表明,bci可以从提议的并行化中受益匪浅:首先,通过减少延迟,其次,通过增加可用于解码的记录通道和信号特征的数量,这些数量超出了单线程可以处理的数量。所提出的软件体系结构为BCI应用程序提供了一个简单而灵活的解决方案。
本文章由计算机程序翻译,如有差异,请以英文原文为准。

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Low-latency multi-threaded processing of neuronal signals for brain-computer interfaces.

Brain-computer interfaces (BCIs) require demanding numerical computations to transfer brain signals into control signals driving an external actuator. Increasing the computational performance of the BCI algorithms carrying out these calculations enables faster reaction to user inputs and allows using more demanding decoding algorithms. Here we introduce a modular and extensible software architecture with a multi-threaded signal processing pipeline suitable for BCI applications. The computational load and latency (the time that the system needs to react to user input) are measured for different pipeline implementations in typical BCI applications with realistic parameter settings. We show that BCIs can benefit substantially from the proposed parallelization: firstly, by reducing the latency and secondly, by increasing the amount of recording channels and signal features that can be used for decoding beyond the amount which can be handled by a single thread. The proposed software architecture provides a simple, yet flexible solution for BCI applications.

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