±0.3V大容量驱动的高性能全差分缓冲器

IF 1.6 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Journal of Low Power Electronics and Applications Pub Date : 2022-06-22 DOI:10.3390/jlpea12030035
Manaswini Gangineni, J. Ramírez-Angulo, H. Vázquez-Leal, J. Huerta-Chua, A. López-Martín, R. Carvajal
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引用次数: 2

摘要

报道了一种在180nm CMOS技术中从±0.3V电源工作的高性能体块驱动轨对轨全差分缓冲器。它有一个差分-差分输入级和共模反馈电路,实现了无尾、高CMRR体驱动的伪差分单元。它在亚阈值下工作,具有无限输入阻抗,低输出阻抗(1.4kΩ), 86.77 dB直流开环增益,172.91 kHz带宽和0.684μW静态功耗,负载电容为50 pF。该缓冲器具有功率效率AB类操作,小信号品质因数FOMS=12.69 MHzpFμW−1,大信号品质因数FOMLS=34.89(V/μs)pFμW−1,CMRR=102 dB,PSRR+=109 dB,PSSR−=100 dB,1.1μV/√Hz输入噪声频谱密度,0.3 mVrms输入噪声和3.5 mV输入直流偏移电压。
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±0.3V Bulk-Driven Fully Differential Buffer with High Figures of Merit
A high performance bulk-driven rail-to-rail fully differential buffer operating from ±0.3V supplies in 180 nm CMOS technology is reported. It has a differential–difference input stage and common mode feedback circuits implemented with no-tail, high CMRR bulk-driven pseudo-differential cells. It operates in subthreshold, has infinite input impedance, low output impedance (1.4 kΩ), 86.77 dB DC open-loop gain, 172.91 kHz bandwidth and 0.684 μW static power dissipation with a 50-pF load capacitance. The buffer has power efficient class AB operation, a small signal figure of merit FOMSS = 12.69 MHzpFμW−1, a large signal figure of merit FOMLS = 34.89 (V/μs) pFμW−1, CMRR = 102 dB, PSRR+ = 109 dB, PSRR− = 100 dB, 1.1 μV/√Hz input noise spectral density, 0.3 mVrms input noise and 3.5 mV input DC offset voltage.
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来源期刊
Journal of Low Power Electronics and Applications
Journal of Low Power Electronics and Applications Engineering-Electrical and Electronic Engineering
CiteScore
3.60
自引率
14.30%
发文量
57
审稿时长
11 weeks
期刊最新文献
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