RISC-V架构的计算机工程教育经验-从计算机架构到微控制器

IF 1.6 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Journal of Low Power Electronics and Applications Pub Date : 2022-08-09 DOI:10.3390/jlpea12030045
P. Jamieson, H. Le, Nathan Martin, Tyler McGrew, Yicheng Qian, Eric Schonauer, Alan Ehret, M. Kinsy
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引用次数: 0

摘要

随着RISC-V和各种开源发布的RISC-V处理器的日益普及,现在计算机工程专业的学生可以探索这种简单而相关的架构,并且这些学生可以使用真实的工具流在底层探索和设计微控制器,并实现和测试他们的硬件。在这项工作中,我们描述了我们与本科工程师在FPGA上构建RISC-V架构的经验,然后扩展他们的经验来实现类似arduino的RISC-V工具流以及相应的硬件和软件来处理输入输出端口,中断,硬件计时器和通信协议。微控制器作为高级设计项目在FPGA上实现,以测试这种努力的可行性。在这项工作中,我们将解释本科生如何获得这些经验,包括为这些项目做准备,他们使用的工具流,理解和扩展具有微控制器功能的RISC-V处理器所面临的挑战,以及如何将这些学习整合到现有课程中的建议,包括讨论我们是否应该在计算机工程本科课程中包括这些更深层次的经验。
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Computer Engineering Education Experiences with RISC-V Architectures—From Computer Architecture to Microcontrollers
With the growing popularity of RISC-V and various open-source released RISC-V processors, it is now possible for computer engineers students to explore this simple and relevant architecture, and also, these students can explore and design a microcontroller at a low-level using real tool-flows and implement and test their hardware. In this work, we describe our experiences with undergraduate engineers building RISC-V architectures on an FPGA and then extending their experiences to implement an Arduino-like RISC-V tool-flow and the respective hardware and software to handle input-output ports, interrupts, hardware timers, and communication protocols. The microcontroller is implemented on an FPGA as a Senior Design project to test the viability of such efforts. In this work, we will explain how undergraduates can achieve these experiences including preparation for these projects, the tool-flows they use, the challenges in understanding and extending a RISC-V processor with microcontroller functionality, and a suggestion of how to integrate this learning into an existing curriculum, including a discussion on if we should include these deeper experiences in the Computer Engineering undergraduate curriculum.
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来源期刊
Journal of Low Power Electronics and Applications
Journal of Low Power Electronics and Applications Engineering-Electrical and Electronic Engineering
CiteScore
3.60
自引率
14.30%
发文量
57
审稿时长
11 weeks
期刊最新文献
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