具有减少导通状态开关的改进结构9电平逆变器(MS9LI)

IF 2.1 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Canadian Journal of Electrical and Computer Engineering Pub Date : 2023-02-23 DOI:10.1109/ICJECE.2022.3222215
Vijayakumar Arun;Sundaramoorthy Prabhu;Natarajan Prabaharan;Balashanmugham Shanthi
{"title":"具有减少导通状态开关的改进结构9电平逆变器(MS9LI)","authors":"Vijayakumar Arun;Sundaramoorthy Prabhu;Natarajan Prabaharan;Balashanmugham Shanthi","doi":"10.1109/ICJECE.2022.3222215","DOIUrl":null,"url":null,"abstract":"This article describes a modified structure 9-level inverter (MS9LI) with a dual dc link and eight switches. The dual dc links are different dc voltage sources with a 1:3 ratio. To generate high-quality nine-level output, the alternative phase opposition and disposition pulsewidth modulation (APODPWM) technique has been used. Most reported reduced device multilevel inverters (MLIs) include several underutilized dc sources and much more active switches. The designed MS9LI is more efficient since it uses fewer conducting switches. The proposed configuration furthermore does not need a backend H-bridge, and voltage stress is not more than the input dc voltage. A series connection of the proposed configuration can also be used to extend the topology. To prove the superior performance of the proposed MS9LI configuration, a detailed comparison with the foremost configurations in terms of the essential number of sources, switches, and drivers is made. In order to confirm the viability and functionality of the MS9LI configuration, various simulation and experimental findings are presented.","PeriodicalId":100619,"journal":{"name":"IEEE Canadian Journal of Electrical and Computer Engineering","volume":"46 1","pages":"15-23"},"PeriodicalIF":2.1000,"publicationDate":"2023-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Modified Structure 9-Level Inverter (MS9LI) With Reduced On-State Switches\",\"authors\":\"Vijayakumar Arun;Sundaramoorthy Prabhu;Natarajan Prabaharan;Balashanmugham Shanthi\",\"doi\":\"10.1109/ICJECE.2022.3222215\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This article describes a modified structure 9-level inverter (MS9LI) with a dual dc link and eight switches. The dual dc links are different dc voltage sources with a 1:3 ratio. To generate high-quality nine-level output, the alternative phase opposition and disposition pulsewidth modulation (APODPWM) technique has been used. Most reported reduced device multilevel inverters (MLIs) include several underutilized dc sources and much more active switches. The designed MS9LI is more efficient since it uses fewer conducting switches. The proposed configuration furthermore does not need a backend H-bridge, and voltage stress is not more than the input dc voltage. A series connection of the proposed configuration can also be used to extend the topology. To prove the superior performance of the proposed MS9LI configuration, a detailed comparison with the foremost configurations in terms of the essential number of sources, switches, and drivers is made. In order to confirm the viability and functionality of the MS9LI configuration, various simulation and experimental findings are presented.\",\"PeriodicalId\":100619,\"journal\":{\"name\":\"IEEE Canadian Journal of Electrical and Computer Engineering\",\"volume\":\"46 1\",\"pages\":\"15-23\"},\"PeriodicalIF\":2.1000,\"publicationDate\":\"2023-02-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Canadian Journal of Electrical and Computer Engineering\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10050856/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Canadian Journal of Electrical and Computer Engineering","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10050856/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0

摘要

本文介绍了一种改进结构的9电平逆变器(MS9LI),该逆变器具有双直流链路和八个开关。双直流链路是比例为1:3的不同直流电压源。为了产生高质量的九电平输出,采用了交替反相和配置脉宽调制(APODPWM)技术。大多数报道的缩减器件多电平逆变器(MLI)包括几个未充分利用的直流电源和更多的有源开关。所设计的MS9LI由于使用较少的导电开关而更加高效。此外,所提出的配置不需要后端H桥,并且电压应力不大于输入直流电压。所提出的配置的串联也可以用于扩展拓扑。为了证明所提出的MS9LI配置的优越性能,在源、开关和驱动器的基本数量方面与最重要的配置进行了详细比较。为了确认MS9LI配置的可行性和功能,给出了各种模拟和实验结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Modified Structure 9-Level Inverter (MS9LI) With Reduced On-State Switches
This article describes a modified structure 9-level inverter (MS9LI) with a dual dc link and eight switches. The dual dc links are different dc voltage sources with a 1:3 ratio. To generate high-quality nine-level output, the alternative phase opposition and disposition pulsewidth modulation (APODPWM) technique has been used. Most reported reduced device multilevel inverters (MLIs) include several underutilized dc sources and much more active switches. The designed MS9LI is more efficient since it uses fewer conducting switches. The proposed configuration furthermore does not need a backend H-bridge, and voltage stress is not more than the input dc voltage. A series connection of the proposed configuration can also be used to extend the topology. To prove the superior performance of the proposed MS9LI configuration, a detailed comparison with the foremost configurations in terms of the essential number of sources, switches, and drivers is made. In order to confirm the viability and functionality of the MS9LI configuration, various simulation and experimental findings are presented.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
CiteScore
3.70
自引率
0.00%
发文量
0
期刊最新文献
Table of Contents Front Cover IEEE Canadian Journal of Electrical and Computer Engineering Green Electricity Share Enhancement Through Rooftop Solar PV System on Institutional Sheds Enhanced Validation of Intelligent Control Algorithms in AC Microgrids
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1