如何推导出量子复杂度的下界

T. Nishino
{"title":"如何推导出量子复杂度的下界","authors":"T. Nishino","doi":"10.1002/ECJC.20298","DOIUrl":null,"url":null,"abstract":"The modeling of computation using logic circuits occupies an important position in the fundamentals of complexity theory including quantum complexity theory. Consequently, research into methods for computing logic functions on quantum circuits as well as for minimizing and simplifying such circuits has become extremely important. In this paper we explicitly formulate the depth minimization problem for quantum logic circuits and show that this problem is closely related to a geometric approach to deriving a lower bound on the size of a quantum logic circuit. © 2007 Wiley Periodicals, Inc. Electron Comm Jpn Pt 3, 90(10): 9–17, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjc.20298","PeriodicalId":100407,"journal":{"name":"Electronics and Communications in Japan (Part III: Fundamental Electronic Science)","volume":"18 1","pages":"9-17"},"PeriodicalIF":0.0000,"publicationDate":"2007-04-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"How to derive a quantum complexity lower bound\",\"authors\":\"T. Nishino\",\"doi\":\"10.1002/ECJC.20298\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The modeling of computation using logic circuits occupies an important position in the fundamentals of complexity theory including quantum complexity theory. Consequently, research into methods for computing logic functions on quantum circuits as well as for minimizing and simplifying such circuits has become extremely important. In this paper we explicitly formulate the depth minimization problem for quantum logic circuits and show that this problem is closely related to a geometric approach to deriving a lower bound on the size of a quantum logic circuit. © 2007 Wiley Periodicals, Inc. Electron Comm Jpn Pt 3, 90(10): 9–17, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjc.20298\",\"PeriodicalId\":100407,\"journal\":{\"name\":\"Electronics and Communications in Japan (Part III: Fundamental Electronic Science)\",\"volume\":\"18 1\",\"pages\":\"9-17\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-04-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Electronics and Communications in Japan (Part III: Fundamental Electronic Science)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1002/ECJC.20298\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electronics and Communications in Japan (Part III: Fundamental Electronic Science)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1002/ECJC.20298","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

逻辑电路计算建模在包括量子复杂性理论在内的复杂性理论基础中占有重要地位。因此,研究在量子电路上计算逻辑函数的方法以及最小化和简化这种电路变得极其重要。本文明确地表述了量子逻辑电路的深度最小化问题,并表明该问题与推导量子逻辑电路尺寸下界的几何方法密切相关。©2007 Wiley期刊公司电子工程学报,2009,29 (3):397 - 397;在线发表于Wiley InterScience (www.interscience.wiley.com)。DOI 10.1002 / ecjc.20298
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How to derive a quantum complexity lower bound
The modeling of computation using logic circuits occupies an important position in the fundamentals of complexity theory including quantum complexity theory. Consequently, research into methods for computing logic functions on quantum circuits as well as for minimizing and simplifying such circuits has become extremely important. In this paper we explicitly formulate the depth minimization problem for quantum logic circuits and show that this problem is closely related to a geometric approach to deriving a lower bound on the size of a quantum logic circuit. © 2007 Wiley Periodicals, Inc. Electron Comm Jpn Pt 3, 90(10): 9–17, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjc.20298
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