{"title":"模块化串联电容器降压拓扑的点负载应用与占空比更自由","authors":"Zhichun Wang, Peng Fang","doi":"10.1109/COMPEL52896.2023.10221005","DOIUrl":null,"url":null,"abstract":"High step-down ratio converters, such as a 48V-1V point of load converter, present cases with significant switching and conduction losses at the same time. One effective solution to reduce these losses is achieving a modularized design, where each module only shares a small fraction of the input voltage and load current. In this paper, we investigate a modular power conversion architecture based on a series capacitor Buck topology. In addition, we proposed a solution to free duty cycle limitation associated with series capacitor Buck converter to enable fast transient response. An experimental prototype has been built and tested to validate the proposed method.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"218 1","pages":"1-8"},"PeriodicalIF":1.0000,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Modular Series Capacitor Buck Topology for Point of Load Applications with Duty Cycle Freer\",\"authors\":\"Zhichun Wang, Peng Fang\",\"doi\":\"10.1109/COMPEL52896.2023.10221005\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"High step-down ratio converters, such as a 48V-1V point of load converter, present cases with significant switching and conduction losses at the same time. One effective solution to reduce these losses is achieving a modularized design, where each module only shares a small fraction of the input voltage and load current. In this paper, we investigate a modular power conversion architecture based on a series capacitor Buck topology. In addition, we proposed a solution to free duty cycle limitation associated with series capacitor Buck converter to enable fast transient response. An experimental prototype has been built and tested to validate the proposed method.\",\"PeriodicalId\":55233,\"journal\":{\"name\":\"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering\",\"volume\":\"218 1\",\"pages\":\"1-8\"},\"PeriodicalIF\":1.0000,\"publicationDate\":\"2023-06-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://doi.org/10.1109/COMPEL52896.2023.10221005\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1109/COMPEL52896.2023.10221005","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS","Score":null,"Total":0}
Modular Series Capacitor Buck Topology for Point of Load Applications with Duty Cycle Freer
High step-down ratio converters, such as a 48V-1V point of load converter, present cases with significant switching and conduction losses at the same time. One effective solution to reduce these losses is achieving a modularized design, where each module only shares a small fraction of the input voltage and load current. In this paper, we investigate a modular power conversion architecture based on a series capacitor Buck topology. In addition, we proposed a solution to free duty cycle limitation associated with series capacitor Buck converter to enable fast transient response. An experimental prototype has been built and tested to validate the proposed method.
期刊介绍:
COMPEL exists for the discussion and dissemination of computational and analytical methods in electrical and electronic engineering. The main emphasis of papers should be on methods and new techniques, or the application of existing techniques in a novel way. Whilst papers with immediate application to particular engineering problems are welcome, so too are papers that form a basis for further development in the area of study. A double-blind review process ensures the content''s validity and relevance.