模块化串联电容器降压拓扑的点负载应用与占空比更自由

IF 1 4区 工程技术 Q4 COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering Pub Date : 2023-06-25 DOI:10.1109/COMPEL52896.2023.10221005
Zhichun Wang, Peng Fang
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引用次数: 0

摘要

高降压比变换器,如48V-1V点负载变换器,同时存在显著的开关和导通损耗。减少这些损耗的一个有效解决方案是实现模块化设计,其中每个模块仅共享一小部分输入电压和负载电流。在本文中,我们研究了一种基于串联电容Buck拓扑的模块化功率转换架构。此外,我们还提出了一种解决串联电容降压转换器的无占空比限制的方案,以实现快速的瞬态响应。建立了一个实验样机并进行了测试,以验证所提出的方法。
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Modular Series Capacitor Buck Topology for Point of Load Applications with Duty Cycle Freer
High step-down ratio converters, such as a 48V-1V point of load converter, present cases with significant switching and conduction losses at the same time. One effective solution to reduce these losses is achieving a modularized design, where each module only shares a small fraction of the input voltage and load current. In this paper, we investigate a modular power conversion architecture based on a series capacitor Buck topology. In addition, we proposed a solution to free duty cycle limitation associated with series capacitor Buck converter to enable fast transient response. An experimental prototype has been built and tested to validate the proposed method.
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来源期刊
CiteScore
1.60
自引率
0.00%
发文量
124
审稿时长
4.2 months
期刊介绍: COMPEL exists for the discussion and dissemination of computational and analytical methods in electrical and electronic engineering. The main emphasis of papers should be on methods and new techniques, or the application of existing techniques in a novel way. Whilst papers with immediate application to particular engineering problems are welcome, so too are papers that form a basis for further development in the area of study. A double-blind review process ensures the content''s validity and relevance.
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