{"title":"Abel-Poisson核数字轮廓平滑的位级收缩阵列","authors":"J. Glasa","doi":"10.1142/S0129626493000071","DOIUrl":null,"url":null,"abstract":"Two different bit-level systolic arrays for digital contour smoothing by Abel-Poisson kernel which minimize the execution time and the number of functional elements required are suggested. The arrays are fully pipelined on the bit-level achieving very high clock frequency. They are implementable in VLSI and are dedicated for real-time applications.","PeriodicalId":44742,"journal":{"name":"Parallel Processing Letters","volume":"8 1","pages":"105-120"},"PeriodicalIF":0.5000,"publicationDate":"1993-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Bit-Level Systolic Arrays for Digital Contour Smoothing by Abel-Poisson Kernel\",\"authors\":\"J. Glasa\",\"doi\":\"10.1142/S0129626493000071\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Two different bit-level systolic arrays for digital contour smoothing by Abel-Poisson kernel which minimize the execution time and the number of functional elements required are suggested. The arrays are fully pipelined on the bit-level achieving very high clock frequency. They are implementable in VLSI and are dedicated for real-time applications.\",\"PeriodicalId\":44742,\"journal\":{\"name\":\"Parallel Processing Letters\",\"volume\":\"8 1\",\"pages\":\"105-120\"},\"PeriodicalIF\":0.5000,\"publicationDate\":\"1993-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Parallel Processing Letters\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1142/S0129626493000071\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Parallel Processing Letters","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1142/S0129626493000071","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS","Score":null,"Total":0}
Bit-Level Systolic Arrays for Digital Contour Smoothing by Abel-Poisson Kernel
Two different bit-level systolic arrays for digital contour smoothing by Abel-Poisson kernel which minimize the execution time and the number of functional elements required are suggested. The arrays are fully pipelined on the bit-level achieving very high clock frequency. They are implementable in VLSI and are dedicated for real-time applications.
期刊介绍：
Parallel Processing Letters (PPL) aims to rapidly disseminate results on a worldwide basis in the field of parallel processing in the form of short papers. It fills the need for an information vehicle which can convey recent achievements and further the exchange of scientific information in the field. This journal has a wide scope and topics covered included: - design and analysis of parallel and distributed algorithms - theory of parallel computation - parallel programming languages - parallel programming environments - parallel architectures and VLSI circuits
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