{"title":"离散电路优化:基于库的栅极尺寸和阈值电压分配","authors":"John Lee, Puneet Gupta","doi":"10.1561/1000000019","DOIUrl":null,"url":null,"abstract":"Discrete gate sizing and threshold assignment are commonly used tools for optimizing digital circuits, and ideal methods for incremental optimization. The gate widths and threshold voltages, along with the gate lengths, can be adjusted to optimize power and delay. This monograph surveys this field, providing the background needed to perform research in the field. Concepts such as standard cell libraries, static timing analysis, and analytical delay and power models are explained, along with examples and data to help understand the tradeoffs involved. Comparative results are also provided to show the current state of the field. Full text available at: http://dx.doi.org/10.1561/1000000019","PeriodicalId":42137,"journal":{"name":"Foundations and Trends in Electronic Design Automation","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2012-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Discrete Circuit Optimization: Library Based Gate Sizing and Threshold Voltage Assignment\",\"authors\":\"John Lee, Puneet Gupta\",\"doi\":\"10.1561/1000000019\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Discrete gate sizing and threshold assignment are commonly used tools for optimizing digital circuits, and ideal methods for incremental optimization. The gate widths and threshold voltages, along with the gate lengths, can be adjusted to optimize power and delay. This monograph surveys this field, providing the background needed to perform research in the field. Concepts such as standard cell libraries, static timing analysis, and analytical delay and power models are explained, along with examples and data to help understand the tradeoffs involved. Comparative results are also provided to show the current state of the field. Full text available at: http://dx.doi.org/10.1561/1000000019\",\"PeriodicalId\":42137,\"journal\":{\"name\":\"Foundations and Trends in Electronic Design Automation\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-03-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Foundations and Trends in Electronic Design Automation\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1561/1000000019\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"Computer Science\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Foundations and Trends in Electronic Design Automation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1561/1000000019","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"Computer Science","Score":null,"Total":0}
Discrete Circuit Optimization: Library Based Gate Sizing and Threshold Voltage Assignment
Discrete gate sizing and threshold assignment are commonly used tools for optimizing digital circuits, and ideal methods for incremental optimization. The gate widths and threshold voltages, along with the gate lengths, can be adjusted to optimize power and delay. This monograph surveys this field, providing the background needed to perform research in the field. Concepts such as standard cell libraries, static timing analysis, and analytical delay and power models are explained, along with examples and data to help understand the tradeoffs involved. Comparative results are also provided to show the current state of the field. Full text available at: http://dx.doi.org/10.1561/1000000019
期刊介绍:
Foundations and Trends® in Electronic Design Automation publishes survey and tutorial articles in the following topics: - System Level Design - Behavioral Synthesis - Logic Design - Verification - Test - Physical Design - Circuit Level Design - Reconfigurable Systems - Analog Design Each issue of Foundations and Trends® in Electronic Design Automation comprises a 50-100 page monograph written by research leaders in the field.