降低成本的异步两级逻辑

I. Lemberski, P. Fiser
{"title":"降低成本的异步两级逻辑","authors":"I. Lemberski, P. Fiser","doi":"10.1109/DDECS.2009.5012101","DOIUrl":null,"url":null,"abstract":"We propose a novel synthesis method of a dual-rail asynchronous two-level logic of reduced cost. It is based on a model that operates under so called modified weak constraints. The logic is implemented as a minimized AND-OR structure, together with the completion detection logic. We formulated and proved the product term minimization constraint that ensures a correct logic behavior. We processed the MCNC benchmarks and generated asynchronous two-level logic. The implementation complexity was compared with the state-of-the-art approach. Using our approach, we achieved a significant improvement.","PeriodicalId":6325,"journal":{"name":"2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems","volume":"42 1","pages":"68-73"},"PeriodicalIF":0.0000,"publicationDate":"2009-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Asynchronous two-level logic of reduced cost\",\"authors\":\"I. Lemberski, P. Fiser\",\"doi\":\"10.1109/DDECS.2009.5012101\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We propose a novel synthesis method of a dual-rail asynchronous two-level logic of reduced cost. It is based on a model that operates under so called modified weak constraints. The logic is implemented as a minimized AND-OR structure, together with the completion detection logic. We formulated and proved the product term minimization constraint that ensures a correct logic behavior. We processed the MCNC benchmarks and generated asynchronous two-level logic. The implementation complexity was compared with the state-of-the-art approach. Using our approach, we achieved a significant improvement.\",\"PeriodicalId\":6325,\"journal\":{\"name\":\"2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems\",\"volume\":\"42 1\",\"pages\":\"68-73\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-04-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DDECS.2009.5012101\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DDECS.2009.5012101","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

摘要

提出了一种降低成本的双轨异步两级逻辑的合成方法。它基于一个在所谓的修正弱约束下运行的模型。该逻辑与补全检测逻辑一起实现为最小化与或结构。推导并证明了保证正确逻辑行为的积项最小化约束。我们处理了MCNC基准测试并生成了异步两级逻辑。将实现的复杂性与最先进的方法进行了比较。使用我们的方法,我们取得了显著的进步。
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Asynchronous two-level logic of reduced cost
We propose a novel synthesis method of a dual-rail asynchronous two-level logic of reduced cost. It is based on a model that operates under so called modified weak constraints. The logic is implemented as a minimized AND-OR structure, together with the completion detection logic. We formulated and proved the product term minimization constraint that ensures a correct logic behavior. We processed the MCNC benchmarks and generated asynchronous two-level logic. The implementation complexity was compared with the state-of-the-art approach. Using our approach, we achieved a significant improvement.
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