可编程集成电路应用的预制高密度TSV中间层

T. Ouyang, Y. Hung, O. Lee, S. Y. Li, W. Chiu, T. Y. Hung, S. H. Wu, H. Chang
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引用次数: 0

摘要

推荐采用通硅通孔中间层实现3D集成电路集成。然而,高密度tsv的电气设计和制造是一个挑战,并且制造能力较低。在本报告中,我们展示了一种预制高密度TSV中间体的新概念。通常可重用的TSV设计可以消除与RDL跟踪互连的兼容性问题。通过修改干硅蚀刻参数和精细电镀条件,最终生产出开孔率为3%、直径与深度长宽比为1:10的300mm以上的TSV晶圆,以实现直孔无空隙的TSV。TSV阵列上的通流密度可以有效地增强用于高I/O引脚数的应用。该信号在20ghz高频下可以保持信号的完整性并具有8gbps的传输速率。在三维集成电路应用中,预制高密度TSV中间层可以有效缩短生产时间,提高吞吐量。
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Pre-fabricated High-density TSV Interposer for Programmable IC Applications
The through-silicon-via interposer is recommended to enable 3D integrated circuit integration. However, the electrical design and manufacture of high-density TSVs is a challenge and has low fabrication capability. In this report, we have demonstrated a novel concept about a pre-fabricated high-density TSV interposer. A commonly reusable TSV design can eliminate the concern of the compatibility issue to interconnecting with the RDL trace. A 3% open ratio TSV with the diameter-to-depth aspect ratio 1:10 over 300 mm wafer is ultimately produced based on the modification of the dry Si etch parameters and subtle electroplating conditions to achieve a straight and void-free TSV. The pass-through current density on the TSV array can be effectively enhanced for a high I/O pin count application. The signal can reserve the integrity and possess an 8 Gbps transmission rate at 20 GHz high frequency. A pre-fabricated high-density TSV interposer can effectively reduce the production time and promote the throughput in 3D integrated circuit applications.
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