硅回声:非侵入式木马和篡改检测使用频率选择阻抗分析

Tahoura Mosavirik, Saleh Khalaj Monfared, Maryam Saadat-Safa, Shahin Tajik
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引用次数: 1

摘要

芯片级篡改的威胁及其检测已经得到了广泛的研究。硬件木马插入是此类篡改事件的突出例子。改变设计的位置和路由或移除电路的一部分用于侧通道泄漏/故障灵敏度放大是此类攻击的其他实例。虽然半侵入性和完全侵入性的物理验证方法可以自信地检测到这种隐蔽的篡改事件,但它们代价高昂、耗时且具有破坏性。另一方面,几乎所有提出的非侵入性侧通道方法都受到噪声的影响,因此置信度较低。此外,它们需要激活电路中被篡改的部分(例如,木马触发器)来比较和检测修改。在这项工作中,我们介绍了一种非侵入性的后硅篡改检测技术,适用于芯片级别的不同类别的篡改事件,而无需激活恶意电路。我们的方法依赖于物理修改(无论其物理,激活或动作特性如何)改变芯片的阻抗。因此,表征阻抗可以导致篡改事件的检测。为了感知阻抗的变化,我们部署了已知的RF工具,即散射参数,其中我们将高频正弦波信号注入系统的配电网络(PDN)并测量信号的“回声”。不同频带的反射信号根据其对模具的影响大小揭示了不同的篡改事件。为了验证我们的说法,我们对在28纳米技术制造的fpga上实现的几个概念验证篡改硬件实现进行了测量。我们进一步表明,部署动态时间翘曲(DTW)距离可以区分由不同芯片/板的制造工艺变化引起的篡改事件和噪声。基于所获得的结果,我们证明了可以检测到隐形硬件木马,以及复杂的P&R修改。
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Silicon Echoes: Non-Invasive Trojan and Tamper Detection using Frequency-Selective Impedance Analysis
The threat of chip-level tampering and its detection has been widely researched. Hardware Trojan insertions are prominent examples of such tamper events. Altering the placement and routing of a design or removing a part of a circuit for side-channel leakage/fault sensitivity amplification are other instances of such attacks. While semi- and fully-invasive physical verification methods can confidently detect such stealthy tamper events, they are costly, time-consuming, and destructive. On the other hand, virtually all proposed non-invasive side-channel methods suffer from noise and, therefore, have low confidence. Moreover, they require activating the tampered part of the circuit (e.g., the Trojan trigger) to compare and detect the modifications. In this work, we introduce a non-invasive post-silicon tamper detection technique applicable to different classes of tamper events at the chip level without requiring the activation of the malicious circuit. Our method relies on the fact that physical modifications (regardless of their physical, activation, or action characteristics) alter the impedance of the chip. Hence, characterizing the impedance can lead to the detection of the tamper events. To sense the changes in the impedance, we deploy known RF tools, namely, scattering parameters, in which we inject sine wave signals with high frequencies to the power distribution network (PDN) of the system and measure the “echo” of the signal. The reflected signals in various frequency bands reveal different tamper events based on their impact size on the die. To validate our claims, we performed measurements on several proof-ofconcept tampered hardware implementations realized on FPGAs manufactured with a 28 nm technology. We further show that deploying the Dynamic Time Warping (DTW) distance can distinguish between tamper events and noise resulting from manufacturing process variation of different chips/boards. Based on the acquired results, we demonstrate that stealthy hardware Trojans, as well as sophisticated modifications of P&R, can be detected.
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