High-current-density InP ultrafine devices for high-speed operation

To realize high-current-density FETs, heavily doped source regions are essential; however, ion implantation of III-V materials cannot supply a sufficiently high level of doping. Our approach to the realization of heavily doped source regions is based on epitaxially grown sources. One approach is the use of an InP/InGaAs composite channel MISFET with regrown InGaAs source/drain. When a gate length of 170 nm was used, Id at Vd = 1 V was 1.34 A/mm. Another approach is the fabrication of a vertical FET. In the case of the vertical FET, an electron launcher for the ballistic transportation of electrons was also introduced. In the fabricated device, the width of the channel mesa was 15 nm. The observed drain current density at Vd = 0.75 V was 1.1 A/mm.