{"title":"猛禽代码在GPU上的实现与评价","authors":"Linjia Hu, S. Nooshabadi, T. Mladenov","doi":"10.1109/ISCE.2012.6241735","DOIUrl":null,"url":null,"abstract":"Raptor code, a member of the fountain code family, is a significant theoretical improvement over the Luby transform code (LT code) for forward error correction (FEC) transmission. Graphics processing units (GPUs) have become a common place in the consumer market and are finding their way beyond graphics processing into general purpose computing. This paper investigates the suitability of GPU for Raptor code to process large block and symbol sizes in FEC transmission. The serial and parallel implementations of Raptor code are explored on CPU and GPU, respectively. Our work show that the efficient parallelization on the GPU can improve the performance of the decoder significantly by a factor of up to 46. Furthermore, to understand the performance bottlenecks of Raptor code on both the GPU and CPU platforms, the decoding speed is evaluated in different block and symbol sizes.","PeriodicalId":6297,"journal":{"name":"2012 IEEE 16th International Symposium on Consumer Electronics","volume":"26 1","pages":"1-6"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Implementation and evaluation of Raptor code on GPU\",\"authors\":\"Linjia Hu, S. Nooshabadi, T. Mladenov\",\"doi\":\"10.1109/ISCE.2012.6241735\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Raptor code, a member of the fountain code family, is a significant theoretical improvement over the Luby transform code (LT code) for forward error correction (FEC) transmission. Graphics processing units (GPUs) have become a common place in the consumer market and are finding their way beyond graphics processing into general purpose computing. This paper investigates the suitability of GPU for Raptor code to process large block and symbol sizes in FEC transmission. The serial and parallel implementations of Raptor code are explored on CPU and GPU, respectively. Our work show that the efficient parallelization on the GPU can improve the performance of the decoder significantly by a factor of up to 46. Furthermore, to understand the performance bottlenecks of Raptor code on both the GPU and CPU platforms, the decoding speed is evaluated in different block and symbol sizes.\",\"PeriodicalId\":6297,\"journal\":{\"name\":\"2012 IEEE 16th International Symposium on Consumer Electronics\",\"volume\":\"26 1\",\"pages\":\"1-6\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-06-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE 16th International Symposium on Consumer Electronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCE.2012.6241735\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 16th International Symposium on Consumer Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCE.2012.6241735","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Implementation and evaluation of Raptor code on GPU
Raptor code, a member of the fountain code family, is a significant theoretical improvement over the Luby transform code (LT code) for forward error correction (FEC) transmission. Graphics processing units (GPUs) have become a common place in the consumer market and are finding their way beyond graphics processing into general purpose computing. This paper investigates the suitability of GPU for Raptor code to process large block and symbol sizes in FEC transmission. The serial and parallel implementations of Raptor code are explored on CPU and GPU, respectively. Our work show that the efficient parallelization on the GPU can improve the performance of the decoder significantly by a factor of up to 46. Furthermore, to understand the performance bottlenecks of Raptor code on both the GPU and CPU platforms, the decoding speed is evaluated in different block and symbol sizes.